
Marco Liess, M.Sc.
Wissenschaftlicher Mitarbeiter
Technische Universität München
TUM School of Computation, Information and Technology
Lehrstuhl für Integrierte Systeme
Arcisstr. 21
80333 München
Tel.: +49.89.289.23873
Fax: +49.89.289.28323
Gebäude: N1 (Theresienstr. 90)
Raum: N2139
Email: marco.liess@tum.de
Curriculum Vitae
- 2022 - heute: Doktorand am LIS, TU München
- 2019 - 2021: Master of Science in Elektro- und Informationstechnik, TU München
- Schwerpunkt: Embedded and Control Systems
- Werkstudent über Microcontroller Security am Fraunhofer Institut für Angewandte und Integrierte Sicherheit (AISEC)
- Masterarbeit: "Frame Synchronization for Satellite-based IoT Applications" am Deutschen Zentrum für Luft- und Raumfahrt (DLR)
- 2016 - 2019: Bachelor of Science in Elektro- und Informationstechnik, TU München
- Schwerpunkt auf Kommunikationsnetze, Embedded Systems und Security
- Bachelorarbeit: "Efficient Key Establishment for IoT Applications" am Fraunhofer (AISEC)
Forschung
Meine Forschungsinteressen umfassen einige Hardware-Aspekte der Netzwerkschnittstelle und der dadurch angebundenen Verarbeitungsressourcen. Dazu zählen die Beschleunigung der Datenwege von Netzwerkinterface zu Prozessor, die Vermeidung von Speicher-Bottlenecks, dynamisches Power Management, effiziente Hashalgorithmen und Lookup-Mechanismen und vieles mehr.
Lehre
Chip Multicore Processors (seit SS 2024)
(Seminar Integrierte Systeme WS 2022/23 bis WS2023/24)
(Seminar on Topics in Integrated Systems WS 2022/23 bis WS2023/24)
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Laufende Arbeiten
SmartNIC-assisted Selective Data Distribution for Image Processing
Beschreibung
To improve the performance and energy efficiency of a
modern server, SmartNICs can be used to preprocess
incoming packets and gather characteristics on traffic
and processing requirements, as well as offer the possibility
to offload and accelerate specific functionalities. In the
context of Data Distribution in Vehicular Networks for
Automated Driving, an existing protocol and software
solution [1] offers the potential for SmartNIC-acceleration.
This state-of-the-art solution relies on selective data
distribution in a ROS2-environment to reduce the amount of
data transferred and thereby improve latency and efficiency.
While the offered software implementation already shows significant improvements, offloading certain protocol and packet processing to the SmartNIC promises much greater gains by avoiding expensive software loops and enabling hardware-accelerated processing.
The goal of this work is to implement the network protocol developed in [1] in FPGA-hardware, preferably using the P4 framework [2]. An existing implementation of the AMD Vitis Net P4 IP core can be used as a starting point. Further, the image processing can be offloaded to the SmartNIC and accelerated using parallel hardware and the onboard HBM on the SmartNIC's FPGA. This requires a custom RTL implementation of image format transformation and caching logic. The existing software implementation shall be used as a design reference and comparison in terms of performance evaluation.
[1] N. Sperling and R. Ernst, "Reducing Communication Cost and Latency in Autonomous Vehicles with Subscriber-centric Selective Data Distribution," 2024 IEEE 99th Vehicular Technology Conference (VTC2024-Spring), Singapore, Singapore, 2024, pp. 1-7
Voraussetzungen
- Programming skills in VHDL/Verilog, C and preferably P4 (and Python)
- Practical experience with FPGA Design and Implementation
- Good Knowledge of computer architecture, low-level software and OSI network model
- Comfortable with the Linux command line and bash
Kontakt
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Email: marco.liess@tum.de
Betreuer:
Linux Scheduler Implications for Load Balancing and Real-Time Networking
Beschreibung
With the advent of research on the next generation of mobile communications 6G, LIS is engaged in exploring architectures and architecture extensions for networking hardware, as well as improving the interaction between SmartNIC hardware, operating system, and application software. As 6G aims to support mission-critical applications, the demand for deterministic, real-time processing within network infrastructure has become paramount. The recent mainline integration of the real-time scheduler in Linux presents a unique opportunity to explore how operating system scheduling decisions directly impact networking performance in time-sensitive environments.
The incoming traffic load and with it the computing requirements on network processing nodes such as edge servers can span multiple magnitudes in a matter of milliseconds and less. This makes the task of load balancing and efficient scheduler decisions increasingly difficult, especially considering additional requirements like priority-awareness.
This thesis investigates the critical intersection of Linux scheduling policies and real-time networking performance. The research goals of this thesis include:
- Evaluating the performance implications of different Linux scheduling policies on networking performance
- Analyzing how scheduling decisions affect deterministic behavior in time-sensitive networking applications
- Assessing efficient load balancing mechanisms and the availability of priority-awareness for specific flows
- Identifying and potentially developing SmartNIC extensions to enhance Linux scheduling decisions
Voraussetzungen
- Good experience with Linux, Command Line Tools and Bash scripting
- Programming skills in C and Python
- Practical experience with the Linux Kernel, Kernel tracing functionality and low-level software
- Solid understanding of operating system concepts and hardware/software interactions
Kontakt
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Betreuer:
Linux Scheduler Implications for Load Balancing and Real-Time Networking
Beschreibung
With the advent of research on the next generation of mobile communications 6G, LIS is engaged in exploring architectures and architecture extensions for networking hardware, as well as improving the interaction between SmartNIC hardware, operating system, and application software. As 6G aims to support mission-critical applications, the demand for deterministic, real-time processing within network infrastructure has become paramount. The recent mainline integration of the real-time scheduler in Linux presents a unique opportunity to explore how operating system scheduling decisions directly impact networking performance in time-sensitive environments.
The incoming traffic load and with it the computing requirements on network processing nodes such as edge servers can span multiple magnitudes in a matter of milliseconds and less. This makes the task of load balancing and efficient scheduler decisions increasingly difficult, especially considering additional requirements like priority-awareness.
This thesis investigates the critical intersection of Linux scheduling policies and real-time networking performance. The research goals of this thesis include:
- Evaluating the performance implications of different Linux scheduling policies on networking performance
- Analyzing how scheduling decisions affect deterministic behavior in time-sensitive networking applications
- Assessing efficient load balancing mechanisms and the availability of priority-awareness for specific flows
- Identifying and potentially developing SmartNIC extensions to enhance Linux scheduling decisions
Voraussetzungen
- Good experience with Linux, Command Line Tools and Bash scripting
- Programming skills in C and Python
- Practical experience with the Linux Kernel, Kernel tracing functionality and low-level software
- Solid understanding of operating system concepts and hardware/software interactions
Kontakt
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Betreuer:
Linux Scheduler Implications for Load Balancing and Real-Time Networking
Beschreibung
With the advent of research on the next generation of mobile communications 6G, LIS is engaged in exploring architectures and architecture extensions for networking hardware, as well as improving the interaction between SmartNIC hardware, operating system, and application software. As 6G aims to support mission-critical applications, the demand for deterministic, real-time processing within network infrastructure has become paramount. The recent mainline integration of the real-time scheduler in Linux presents a unique opportunity to explore how operating system scheduling decisions directly impact networking performance in time-sensitive environments.
The incoming traffic load and with it the computing requirements on network processing nodes such as edge servers can span multiple magnitudes in a matter of milliseconds and less. This makes the task of load balancing and efficient scheduler decisions increasingly difficult, especially considering additional requirements like priority-awareness.
This thesis investigates the critical intersection of Linux scheduling policies and real-time networking performance. The research goals of this thesis include:
- Evaluating the performance implications of different Linux scheduling policies on networking performance
- Analyzing how scheduling decisions affect deterministic behavior in time-sensitive networking applications
- Assessing efficient load balancing mechanisms and the availability of priority-awareness for specific flows
- Identifying and potentially developing SmartNIC extensions to enhance Linux scheduling decisions
Voraussetzungen
- Good experience with Linux, Command Line Tools and Bash scripting
- Programming skills in C and Python
- Practical experience with the Linux Kernel, Kernel tracing functionality and low-level software
- Solid understanding of operating system concepts and hardware/software interactions
Kontakt
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Betreuer:
Abgeschlossene Arbeiten
2025
Bachelorarbeiten
-
15.09.2025
Packet Trace Replay for 100Gbps FPGA-based Network Tester
Betreuer:Marco Liess -
14.04.2025
Software Implementation of SmartNIC-assisted Load Balancing
Betreuer:Marco Liess
Masterarbeiten
-
21.10.2025 Johanes Andrian Kartono
SmartNIC Hardware Extensions for Load Monitoring and Interrupt-based Power Management
Betreuer:Marco Liess
Seminare
-
10.02.2025
An Overview of Service Migration in Modern Edge Computer Networks
Betreuer:Marco Liess
Studentische Hilfskräfte
-
31.03.2025
Extending FPGA Network Driver with AF_XDP Support
Betreuer:Marco Liess
2024
Bachelorarbeiten
-
30.10.2024 Ida Kastlunger
Webserver Setup for Benchmarking of a SmartNIC-Assisted Server
Betreuer:Marco Liess -
02.10.2024
Hardware Interrupt Generation for Smart Servers
Betreuer:Marco Liess
Masterarbeiten
-
12.09.2024
Unlocking Power Saving Potential: Evaluating and Enhancing Idle-Governor Strategies
Betreuer:Marco Liess, Hagen Pfeifer (Rohde & Schwarz) -
28.06.2024
Multicore-Optimierung eines bildverarbeitenden Systems
Betreuer:Marco Liess -
24.05.2024 Vu Thien Quang Phan
SmartNIC Enhancements for Network Node Resilience
Betreuer:Marco Liess
Forschungspraxis (Research Internships)
-
12.11.2024 Changfeng Xie
FPGA-based Network Tester for 100 Gbps
Betreuer:Marco Liess -
14.03.2024
Bring-up and Evaluation of DPDK Network Driver for FPGA-based Networking
Betreuer:Marco Liess -
09.02.2024
Porting of Load Balancing Mechanism to 100 Gbps SmartNICs
Betreuer:Marco Liess
Seminare
-
09.07.2024
Exploring Linux eBPF Mechanism for SmartNICs
Betreuer:Marco Liess -
01.02.2024
Innovations in Silicon Photonics for On-Chip Interconnects
Betreuer:Marco Liess -
01.02.2024
Power Management Approaches for Network Processing Nodes
Betreuer:Marco Liess -
25.01.2024
Power Management for Network Packet Processing
Betreuer:Marco Liess
Studentische Hilfskräfte
-
31.08.2024
Implementation and Evaulation of Hardware Match-Action Tables on FPGA
Betreuer:Marco Liess
Interdisziplinäre Projekte
-
13.03.2024
Exploring Power Management of AMD Processors in Linux
Betreuer:Marco Liess
2023
Forschungspraxis (Research Internships)
-
30.06.2023
Implementation of HDL Design for Packet Processing with 10 Gbps Breakout Capabilities
Betreuer:Marco Liess
Seminare
-
08.02.2023
Tackling the Memory Bottleneck in Network Processing
Betreuer:Marco Liess -
08.02.2023
CPU Bypassing for Faster Network Processing
Betreuer:Marco Liess -
27.01.2023
Different Approaches of Memory Architecture in Network Hardware
Betreuer:Marco Liess -
27.01.2023
CPU Bypassing for Faster Network Processing
Betreuer:Marco Liess
Studentische Hilfskräfte
-
30.09.2023
Bring-up and Evaluation of FPGA Network Accelerator Boards
Betreuer:Marco Liess
2022
Seminare
-
20.07.2022
A Survey on Network Traffic Prediction for Power Management
Betreuer:Marco Liess
Publikationen
- Reflex-enhanced Computing for Adaptive 6G Hardware. In: 6G-life: Unveiling the Future of Technological Sovereignty, Sustainability and Trustworthiness. Academic Press (1. Aufl.), 2026 mehr… BibTeX
- 6G Network Design and Operations. In: 6G-life: Unveiling the Future of Technological Sovereignty, Sustainability and Trustworthiness. Academic Press (1. Aufl.), 2026 mehr… BibTeX
- ecoNIC: SmartNIC-assisted power management for networking workloads in Linux servers. Microprocessors and Microsystems 105209, 2025 mehr… BibTeX Volltext ( DOI )
- Linux Power Management - Challenges in Modern Servers and how SmartNICs can help. ecoCompute Conference 2025, 2025 mehr… BibTeX
- Reflex-based Wire-rate Traffic Steering and Dynamic Service Relocation in Smart Edge Network Interface Cards (SENIC). International Conference on Mobile and Miniaturized Terahertz Systems (ICM2TS), 2025 mehr… BibTeX Volltext ( DOI )
- HiPerNoC: A High-Performance Network-on-Chip for Flexible and Scalable FPGA-Based SmartNICs. 2025 Design, Automation & Test in Europe Conference (DATE), 2025 mehr… BibTeX Volltext ( DOI )
- FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar. 2024 27th Euromicro Conference on Digital System Design (DSD), 2024 mehr… BibTeX Volltext ( DOI )
- FlexRoute: A Fast, Flexible and Priority-Aware Packet-Processing Design. 2024 32nd Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), 2024 mehr… BibTeX Volltext ( DOI )
- ecoNIC: Saving Energy through SmartNIC-based Load Balancing of Mixed-Critical Ethernet Traffic. 27th Euromicro Conference on Digital System Design (DSD) 2024, 2024 mehr… BibTeX Volltext ( DOI )
- X-MAPE: Extending 6G-connected Self-adaptive Systems with Reflexive Actions. 2023 IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN), 2023 mehr… BibTeX Volltext ( DOI )
- FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs. 2023 IFIP/IEEE 31st Conference on Very Large Scale Integration (VLSI-SoC), 2023 mehr… BibTeX Volltext ( DOI )
- Frame Synchronization Algorithms for Satellite Internet of Things Scenarios. 2022 11th Advanced Satellite Multimedia Systems Conference and the 17th Signal Processing for Space Communications Workshop (ASMS/SPSC), 2022 mehr… BibTeX Volltext ( DOI )