Interdisziplinäre Projekte

With the advent of research on the next generation of
mobile communications 6G, we are engaged in exploring
architecture extensions for Smart Network Interface Cards
(SmartNICs). To enable adaptive, energy-efficient and
low-latency network interfaces, we are prototyping a
custom packet processing pipeline on FPGA-based NICs,
partially based on the open-nic project
(https://github.com/Xilinx/open-nic).

Incoming packet flows should be differentiated and differently
processed, which is typically solved with match-action tables (MATs).
MATs match on a certain packet condition (e.g. packet header 5-tuple) and execute an according action (e.g. dropping, forwarding or modifying the packet). A recent Xilinx IP core implements MATs that can be programmed with P4, a programmable packet processing language gaining momentum in networking. The goal of this work is to investigate the implementation of MATs in hardware, integrate them into our current HDL design based on open-nic and test and evaluate the results.

•     Programming skills in VHDL/Verilog and C (and Python)
•     Practical experience with FPGA Design and Implementation
•     Good Knowledge of computer networks, OSI layer model and protocols
•     Preferably basic knowledge of P4 packet processing language

In this thesis, you lead the design and development of a web application to control a hardware demonstration platform and visualize the load of the available hardware resources, such as CPUs and hardware units. The used hardware platform is a Xilinx Zynq board. This features a heterogeneous ARM multicore setup directly integrated into the ASIC, combined with programmable logic in the FPGA part of the chip. In the FPGA, a hardware assist is implemented that improves blocking mechanisms in Linux by assisting the kernel with managing waiting threads. For further insights, the FPGA is also equipped with a 10G ethernet connection to send live data to a different PC for analysis and status information.

Responsibilities:

• Understand the hardware demonstration platform's functionality and requirements for visualization and control.
• Utilize your expertise in web development to design and create an interactive web application that visually represents hardware resource utilization (e.g., CPUs, hardware units) through graphs, charts, or other intuitive visualizations.
• Develop a user-friendly control interface within the web application allowing users to start, manage, and monitor software applications running on the demonstration platform.
• Conduct comprehensive testing, debugging, and optimization of the web application to ensure seamless functionality and performance.
• Engage in regular meetings, providing updates on the project's progress, and actively participate in software design and implementation discussions.

• Experience with data visualization libraries or similar tools to create dynamic and informative visual representations.
• First experience in web development projects, coursework, or internships showcasing relevant skills and expertise.
• Understanding of hardware resource monitoring and visualization concepts and the ability to translate these into effective user interfaces.
• Strong problem-solving skills, attention to detail, and the ability to work both independently and collaboratively in a team environment.
• Knowledge of system administration or hardware-related concepts to facilitate seamless integration between the web application and the demonstration platform.