Interdisziplinäre Projekte

In this thesis, you lead the setup of the L4Re (L4 Runtime Environment) on Raspberry Pi devices. This is an exciting opportunity to work on cutting-edge technology, combining the flexibility of L4 microkernel architecture with the capabilities of Raspberry Pi to build secure and modular operating systems for embedded systems.

You will delve into the fascinating world of microkernel architecture. Unlike traditional monolithic kernels, where most functionality resides within the kernel, microkernels follow a minimalist approach. The microkernel serves as a lightweight core, providing only essential services such as interprocess communication (IPC) and memory management. Additional operating system services and functionalities, including device drivers and file systems, are implemented as separate user-level processes or servers that run outside the microkernel.

Responsibilities:

• Set up and configure the development environment for L4Re on Raspberry Pi, including toolchain and cross-compilation environment.
• Obtain the L4Re source code by downloading from the official repository or using a specific release.
• Build the L4Re system for Raspberry Pi, ensuring successful compilation and linking of components.
• Deploy the compiled L4Re system onto Raspberry Pi boards, including bootloader setup and configuration.
• Test and verify the functionality and performance of the L4Re system on Raspberry Pi, conducting both functional and security evaluations.
• Develop custom components and applications on top of L4Re, integrating them into the system and extending its functionality.
• Document the setup process, configurations, and customizations, ensuring clear and concise documentation for future reference.

• Solid understanding of embedded systems development and experience with low-level programming.
• Proficiency in C/C++ programming languages and familiarity with cross-compilation environments.
• Strong knowledge of operating system concepts and microkernel architectures, preferably with experience working with L4-based systems.
• Experience with Raspberry Pi development and configuration, including bootloader setup and deployment.
• Familiarity with embedded Linux, device drivers, and system-level software development.
• Excellent problem-solving skills and the ability to troubleshoot complex issues.

Since DRAM typically come with much higher access latencies than SRAM, many approaches to reduce DRAM latencies have already been explored, such as Caching, Access predictors, Row-buffers etc.

In the CeCaS research project, we plan to employ an additional mechanism, in detail a preloading mechanism of a certain fraction of the DRAM content to a small on-chip SRAM buffer. Thus, it is required to predict potentially next-accessed Cachelines, preload them to the SRAM and answer subsequent memory requests of this data from the SRAM instead forwarding them to the DRAM itself.

This functionality should be implemented as a TLM/SystemC model using Synopsys Platform Architect. A baseline system will bw provided, the goal is to implement this functionality in its simplest form as a baseline. Depending on the progress, this can be extended or refined in subsequent steps.

A close supervision, especially during the inital phase, will be guaranteed. Nevertheless, some experience with TLM modelling (e.g. SystemC Lab of LIS) or C++ programming is required.

• Experience with TLM modelling (e.g. SystemC Lab of LIS)
• B.Sc. in Electrical Engineering or similar

Context:

Future cars have a wide variety of sensors such as cameras, LiDARs and RADARs that generate a large amount of data. This data has to be sent via an intra-vehicular network (IVN) to further processing nodes and, ultimately, actuators have to react to the sensor input. Inbetween the processing steps the intra-vehicular network has to ensure that all of the data and control signals reach their destination in time. Hence, next to a large amount of data, there are also strict timing constraints that the intra-vehicular network has to cope with. Therefore, the so called time-sensitive networking (TSN) has been introduced. The functional safety of such networks plays an important role against the background of higly automated driving. Emerging errors have to be detected early and potential countermeasures have to be taken to keep the vehicle in a safe state. Therefore, highly sophisticated monitoring and diagnosis algorithms are a key requirement for future cars. (See Project EMDRIVE)

Our approach for such diagnosis builds on non-intrusively monitoring the intra-vehicular network by snooping on data traffic at an interconnect in the car. An analysis of the traffic shall give information about anomalies that occur inside the network as symptoms of an error inside the electrical architecture.

THIS WORK:

Substance of this work is to first work into an existing simulation environment for an IVN with TSN in OMNET++. Based on the already existing work, several extensions have to be implemented (C++ based) in the simulation environment to mimic certain fault classes like delayed messages, broken links, etc. These fault classes can then later on be injected into the IVN simulation. (FP or IDP)

It is desired to combine Forschungspraxis and Master thesis in the context of this project. In this way, the time during Forschungspraxis can be used to familiarize with the OMNET++ simulation environment.

OSI-Layer
Basic knowledge in C++
Basic knowledge in simulations

CONTEXT:

Future cars have a wide variety of sensors such as cameras, LiDARs and RADARs that generate a large amount of data. This data has to be sent via an intra-vehicular network (IVN) to further processing nodes and, ultimately, actuators have to react to the sensor input. Inbetween the processing steps the intra-vehicular network has to ensure that all of the data and control signals reach their destination in time. Hence, next to a large amount of data, there are also strict timing constraints that the intra-vehicular network has to cope with. Therefore, the so called time-sensitive networking (TSN) has been introduced. The functional safety of such networks plays an important role against the background of higly automated driving. Emerging errors have to be detected early and potential countermeasures have to be taken to keep the vehicle in a safe state. Therefore, highly sophisticated monitoring and diagnosis algorithms are a key requirement for future cars. (See Project EMDRIVE)

Our approach for such diagnosis builds on non-intrusively monitoring the intra-vehicular network by snooping on data traffic at an interconnect in the car. An analysis of the traffic shall give information about anomalies that occur inside the network as symptoms of an error inside the electrical architecture.

FORSCHUNGSPRAXIS:

Substance of this work is to first work into an existing simulation environment for an IVN with TSN in OMNET++. Based on the already existing work, several extensions have to be implemented (C++ based) in the simulation environment to mimic certain fault classes like delayed messages, broken links, etc. These fault classes can then later on be injected into the IVN simulation. (FP or IDP)

MASTERARBEIT:

Subsequently, the IVN simulation can be used to generate a stream of Ethernet traffic that can be investigated for aforementioned anomalous behavior. The challenge is to detect and classify anomalous behavior without any preknowledge on timing and nature of the same. Therefore, several methods can be applied, ranging from static measurement methods to AI based anomaly detection. The focus of this work could lie on the application of LSTM or transformer-based models. The preferred development environment builds on python and related libraries like TensorFlow and Keras. Comparing at least two different anomaly detection methods and exploring, as well as discussing their respective advantages rounds up the master thesis. (M)

It is desired to combine Forschungspraxis and Master thesis in the context of this project. In this way, the time during Forschungspraxis can be used to familiarize with the OMNET++ simulation environment.

If you are interested, feel free to contact me! Please send your CV as well as a recent transcript.

In the course of both projects (FP+MA) it is possible to take enough time to work into the related technichal fields. The main skills that will be developed and needed during this project are the following:

OSI-Layer,
Basics in automotive E/E architectures,
Basics in simulations (OMNET++)
Basics in C++ and Python
Experience with AI (TensorFlow and Keras)

The operating system is responsible for scheduling different threads and processes running in the system. Hereby, the goal of the operating system is to provide each thread a fair share of the underlying available compute resources. The Linux kernel includes a software scheduler which determines where and when each thread should run. This decision is critical for the performance of multi-threaded application where compute resources need to be efficiently shared among multiple threads. Furthermore, the time it takes to make this decision and to switch from one thread to another are critical performance parameters for any software scheduler.

For this project, the goal is to analyze the Linux Scheduler and determine how hardware acceleration can be supported. This can include replacing scheduling classes or offloading specific scheduling functions to a hardware accelerator. At the end of the project a concept for hardware acceleration for the Linux Scheduler should be presented. The project is divided into two subprojects. One part focuses on the regular scheduling functions which are called during the periodic scheduler calls in the Linux kernel, while the other takes a look at rescheduling functionalities through interrupts.

Evaluation and comparisons are to be done with the full system cycle accurate simulator GEM5. For this, an existing setup of an ARM architecture including various tracing options is available.