Tim Twardzik, M.Sc.
Technische Universität München
School of Computation, Information and Technology
Lehrstuhl für Integrierte Systeme
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Analyzing Power Consumption in a Simulation Model
Next to the raw computational performance of an system on chip (SoC), the power consumption is an important trait. Especially in the mobile domain, where the efficiency of the SoC is critical, the power consumption of the whole system needs to be considered. Multiple factors contribute to the overall power consumption, such as activity/state of the CPU, memory accesses including cache misses and use of potential hardware acceleration.
In this work the power consumption of a SoC should be analyzed, herefor an gem5 simulation model exists.
Exploring Hardware-Acceleration for the Linux Scheduler
The operating system is responsible for scheduling different threads and processes running in the system. Hereby, the goal of the operating system is to provide each thread a fair share of the underlying available compute resources. The Linux kernel includes a software scheduler which determines where and when each thread should run. This decision is critical for the performance of multi-threaded application where compute resources need to be efficiently shared among multiple threads. Furthermore, the time it takes to make this decision and to switch from one thread to another are critical performance parameters for any software scheduler.
For this project, the goal is to analyze the Linux Scheduler and determine how hardware acceleration can be supported. This can include replacing scheduling classes or offloading specific scheduling functions to a hardware accelerator. At the end of the project a concept for hardware acceleration for the Linux Scheduler should be presented. The project is divided into two subprojects. One part focuses on the regular scheduling functions which are called during the periodic scheduler calls in the Linux kernel, while the other takes a look at rescheduling functionalities through interrupts.
Evaluation and comparisons are to be done with the full system cycle accurate simulator GEM5. For this, an existing setup of an ARM architecture including various tracing options is available.
- HW-FUTEX: Hardware-Assisted Futex Syscall. IEEE Transactions on Very Large Scale Integration Systems, 2023 mehr… BibTeX Volltext ( DOI )
- HAWEN: Hardware Accelerator for Thread Wake-Ups in Linux Event Notification. 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023 mehr… BibTeX
- GLS Tracing: Gem5-based Low-intrusive Software Tracing. 2022 IEEE Nordic Circuits and Systems Conference (NorCAS), 2022 mehr… BibTeX
- X-CEL: A Method to Estimate Near-Memory Acceleration Potential in Tile-based MPSoCs. ARCS 2020 - 33rd International Conference on Architecture of Computing Systems, 2020 mehr… BibTeX