IPF2: Towards Networked and Data-Centric Platforms

The IPF2 project focusses on expanding the factory concept of IPF1 towards multiple, networked and heterogeneous multicore processors. A very well known application would be a distributed ECU(electronic control unit) infrastructure found in modern automotive vehicles (see picture above). In such a distributed ECU, multiple multicore processors with different levels of heterogeniuity (e.g. CPUs, GPUs, FPGAs) are connected together using a high speed communication networks e.g. time sensitive networks (TSNs). In such automotive vehicle architectures, a large amount of data is being generated on the vehicle by the high quality, high data rate sensors (e.g. cameras, lidar, radar) and also the data generated by vehicular functions such as advanced driver assistance (ADAS) and highly autonomous driving (HAD) functions. To address the processing and transfer of such a large amount of data, we forsee the necessity to shift from a predominantly compute-centric in architecture development towards a holistic compute- and data-centric perspective. The IPF2 project with its new data-centric perspective will affect where and how data is stored, transferred and processed within a vehicle, as well as between different vehicles in the future (e.g. vehicle platooning).


Our work

Towards the goal of a data-centric perspective design of networked multi-core processors, our work at TUM addresses two major problems:

1. Developing configurable dynamic NUMA for faster memory access among network connected multi-core systems.

Modern vehicle architecture are made up of a few domain specific computers plus one or more high performance units for automated driving and sensor fusion. The compute units are connected together by a Time Sensitive Network (TSN) which is a real-time version of Ethernet. The sensors generate a lot of data which are fused by the sensor fusion entity and stored in a centralized location. The results can then be accessed over the network. This compute-centric approach although cost-efficient is not power and performance optimal. Factors such as access latency, network load  and power consumption strongly depend on the distance between the data i.e memory and the processing units. Dynamic-NUMA focusses on allowing the network-connected architectures to directly access the memory of the other networked nodes in a decentralized manner to improve performance.

2. Task and Data Migration Mechanisms using Learning Classifier Tables
In modern vehicles, data is generated from different locations and are processed. The execution time of the task processing the data is highly dependent on where the data is generated and stored. The performance of the task can be improved by either moving the data closer to the task or vice versa. In this work, we track different metrics such as number of memory accesses to local node and networked node, execution time, power consumption of the processing node and use them in conjunction with our Learning Classifier Tables, to learn a policy in runtime to either migrate the task or the data in the networked architecture.

Interested? Apply to open positions below or contact us by email.

If you are interested in our IPF project and want to get involved in projects that involves around data-centric architecture development, dynamic NUMA, task and data migration in network connected heterogenous multi-core systems, please feel free to apply to one of the positions available below or contact the respective staff members.

Thesis Offers

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Ongoing Thesis

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  • Anmol Prakash Surhonne, Florian Maurer, Thomas Wild, Andreas Herkersdorf: LCT-TL: Learning Classifier Table (LCT) with Transfer Learning for run-time SoC performance-power optimization. 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC 2023), 2023 mehr… BibTeX
  • Anmol Prakash Surhonne, Florian Maurer, Thomas Wild, Andreas Herkersdorf: LCT-DER: Learning Classifier Table with Dynamic-sized Experience Replay for run-time SoC performance-power optimization. The Genetic and Evolutionary Computation Conference (GECCO), 2023 mehr… BibTeX Volltext ( DOI )
  • Klajd Zyla, Florian Maurer, Thomas Wild, Andreas Herkersdorf: CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs. 36th GI/ITG International Conference on Architecture of Computing Systems, 2023 mehr… BibTeX Volltext ( DOI )
  • Maurer, Florian; Thoma, Moritz; Surhonne, Anmol Prakash; Donyanavard, Bryan; Herkersdorf, Andreas: Machine Learning in Run-Time Control of Multicore Processor Systems. it - Information Technology 0 (0), 2023 mehr… BibTeX Volltext ( DOI )
  • Nora Sperling, Alex Bendrick, Dominik Stöhrmann, Rolf Ernst, Bryan Donyanavard, Florian Maurer, Oliver Lenke, Anmol Surhonne, Andreas Herkersdorf, Walaa Amer, Caio Batista de Melo, Ping-Xiang Chen, Quang Anh Hoang, Rachid Karami, Biswadip Maity, Paul Nikolian, Mariam Rakka, Dongjoo Seo, Saehanseul Yi, Minjun Seo, Nikil Dutt, Fadi Kurdahi: Information Processing Factory 2.0 - Self-awareness for Autonomous Collaborative Systems. DATE 2023, 2023 mehr… BibTeX Volltext ( DOI )


  • Anmol Prakash Surhonne, Nguyen Anh Vu Doan, Florian Maurer, Thomas Wild, and Andreas Herkersdorf: GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization. Architecture of Computing Systems, 2022 mehr… BibTeX Volltext ( DOI )


  • Biswadip Maity, Bryan Donyanavard, Anmol Prakash Surhonne, Amir Rahmani, Andreas Herkersdorf, Nikil Dutt: SEAMS: Self-Optimizing Runtime Manager for Approximate Memory Hierarchies. ACM Transactions on Embedded Computing Systems (TECS), 2021 mehr… BibTeX Volltext ( DOI )


  • Eberle Andrey Rambo; Bryan Donyanavard; Minjun Seo; Florian Maurer; Thawra Mohammad Kadeed; Caio Batista De Melo; Biswadip Maity; Anmol Surhonne; Andreas Herkersdorf; Fadi Kurdahi; Nikil D. Dutt; Rolf Ernst: The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing. IEEE Transactions on Emerging Topics in Computing, 2020, 1-1 mehr… BibTeX Volltext ( DOI )
  • Florian Maurer, Bryan Donyanavard, Amir M. Rahmani, Nikil Dutt, Andreas Herkersdorf: Emergent Control of MPSoC Operation by a Hierarchical Supervisor / Reinforcement Learning Approach. DATE 2020, 2020 mehr… BibTeX Volltext ( DOI )


  • Donyanavard, Bryan; Sadighi, Armin; Maurer, Florian; Mück, Tiago; Rahmani, Amir M.; Herkersdorf, Andreas; Dutt, Nikil: SOSA: Self-Optimizing Learning with Self-Adaptive Control for Hierarchical System-on-Chip Management. Proceedings of the 52Nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '52), ACM, 2019 mehr… BibTeX Volltext ( DOI )
  • Rambo, Eberle A.; Kadeed, Thawra; Ernst, Rolf; Seo, Minjun; Kurdahi, Fadi; Donyanavard, Bryan; de Melo, Caio Batista; Maity, Biswadip; Moazzemi, Kasra; Stewart, Kenneth; Yi, Saehanseul; Rahmani, Amir M.; Dutt, Nikil; Maurer, Florian; Doan, Nguyen Anh Vu; Surhonne, Anmol; Wild, Thomas; Herkersdorf, Andreas: The Information Processing Factory: A Paradigm for Life Cycle Management of Dependable Systems. ESweek, 2019 mehr… BibTeX Volltext ( DOI )


  • Mischa Möstl, Johannes Schlatow, Rolf Ernst, Nikil Dutt, Ahmed Nassar, Amir Rahmani, Fadi J. Kurdahi, Thomas Wild, Armin Sadighi, Andreas Herkersdorf: Platform-Centric Self-Awareness as a Key Enabler for Controlling Changes in CPS. IEEE, 2018 Proceedings of the IEEE mehr… BibTeX
  • Armin Sadighi, Bryan Donyanavard, Thawra Kadeed, Kasra Moazzemi, Tiago Mück, Ahmed Nassar, Amir M. Rahmani, Thomas Wild, Nikil Dutt, Rolf Ernst, Andreas Herkersdorf, Fadi Kurdahi: Design methodologies for enabling self-awareness in autonomous systems. 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), IEEE, 2018 mehr… BibTeX