Florian Maurer, M.Sc.

Research Associate 

Technical University of Munich
TUM School of Computation, Information and Technology
Chair of Integrated Systems
Arcisstr. 21
80290 München
Germany

Phone: +49.89.289.23870
Fax: +49.89.289.28323
Building: N1 (Theresienstr. 90)
Room: N2117
Email: flo.maurer@tum.de

PGP: 4BDA 3220 67D6 86CD C4A9 7CC5 0F74 8369 E8AF 2BFF

CURRICULUM VITAE

  • Since November 2018: Doctoral Candidate at LIS
  • 2018: M.Sc., Electrical and Computer Engineering, Technische Universität München
    Master Thesis: "Hierarchical Control Structure for Autonomic MPSoCs"
  • 05/2018 - 09/2018: Master Thesis at UC Irvine, CA, USA
  • 2016: B.Sc. Electrical and Computer Engineering, Technische Universität München
    Bachelor Thesis: "Design, Simulation and Optimization of a Variable Optical Attenuator Driver"
  • Intern / Working Student at:
    • DR. JOHANNES HEIDENHAIN GmbH
    • Duschl Ingenieure GmbH & Co KG
    • Elektrotechnik Pichler
  • Tutor for:
    • Labcourse Crypto Implementation
    • Lab Electrical Engineering
    • MATLAB in Stochastic Signals

Teaching

Project Laboratory IC Design (SS 2019 - SS 2020)

Digitaltechnik (since WS 2020/21)

System-on-Chip Solutions & Architecture (since WS 2021/22)

Summer School Workshop (WS 2022/23)

Student Work

Thesis Offers

Interested in an internship or a thesis? Please send me an email.
The given type of work is just a guideline and could be changed if needed.
From time to time, there might be some work, that is not announced yet. Feel free to ask!

Assigned Theses

Duckietown - Lane Following with Platooning

Description

At LIS, we want to use the Duckietown hardware and software ecosystem to experiment with our reinforcement learning-based learning classifier tables (LCT) as part of the control system of the Duckiebots: https://www.ce.cit.tum.de/lis/forschung/aktuelle-projekte/duckietown-lab/.

More information on Duckietown can be found at https://www.duckietown.org/.

In this student work, we want to extend the bot's current abilities (lane following).

The goal of this work is to enable the bots to follow each other with a constant distance.
At the end, there should be a seamless integration in the Lane Following Pipeline.

Prerequisites

  • Knowledge about Image Processing
  • Python

Contact

flo.maurer@tum.de
michael.meidinger@tum.de

Supervisor:

Florian Maurer, Michael Meidinger

Duckietown - Lane Detection with Obstacle Avoidance and Intersection Recognition

Description

At LIS, we want to use the Duckietown hardware and software ecosystem to experiment with our reinforcement learning-based learning classifier tables (LCT) as part of the control system of the Duckiebots: https://www.ce.cit.tum.de/lis/forschung/aktuelle-projekte/duckietown-lab/.

More information on Duckietown can be found at https://www.duckietown.org/.

In this student work, we want to extend the bot's current abilities (lane following).

The goal of this work is to enable the bots to avoid obstacles on the road (e.g. ducks, other bots, ...) and to stop at intersections (red lines) for a predefined time.
At the end, there should be a seamless integration in the Lane Following Pipeline.

Prerequisites

  • Knowledge about Image Processing
  • Python

Contact

flo.maurer@tum.de
michael.meidinger@tum.de

Supervisor:

Florian Maurer, Michael Meidinger

Comparison of Safety Guarantee Mechansims for LCTs

Description

This thesis compares safety implementations for LCTs and decisively determines the superior one through simulations. The aim is to identify the safety mechanism with the best performance without violating any constraints.
To achieve this, different approaches (shielding, forbidden classifier) have to be implemented in MATLAB and good settings have to be found for each implementation.

The project is divided into two phases.

To accomplish our objective, we will implement different approaches, such as the Forbidden Classifier, Preemptive Shielding, and Post-posed Shield. We will compare these implementations with the archive we already have.   Throughout the implementation process, we will determine several properties, including how to build the forbidden classifier table, how to build the shield (i.e., what actions should be valid), and how to set the reward for the post-posed shield. Optimizing performance may require fine-tuning.

After completing the simulation phase in Matlab, we will make a decision on whether to implement the approach in hardware or test it in our Duckietown environment.

Contact

flo.maurer@tum.de

Supervisor:

Duckietown - Image Processing on FPGAs

Description

At LIS we want to use the Duckietown hardware and software ecosystem for experimenting with our reinforcement learning based learning classifier tables (LCT) as part of the control system of the Duckiebots: https://www.ce.cit.tum.de/lis/forschung/aktuelle-projekte/duckietown-lab/

More information on Duckietown can be found on https://www.duckietown.org/.

In this student work, we want to enable the use of the FPGA in the Lane Detection.
Previous work already experimented with the communication between NVIDIA Jetson and the FPGA via a DMA.

Goal of this work is to port the LSD to FPGA to benefit from offloading parts of the Lane Detection Alogithm from the CPU and execute them accelerated on the FPGA.
At the end, there should be a seamless integration in the Lane Following Pipeline.

Prerequisites

  • Knowledge about Image Processing
  • Lots of FPGA experience
  • VHDL
  • Python

Contact

flo.maurer@tum.de
michael.meidinger@tum.de

Supervisor:

Florian Maurer, Michael Meidinger

Development of a Packet Forwarding Application in RTEMS

Description

In our IPF project, we optimize application execution during runtime by using self-aware DVFS and task mapping algorithms.

For "real-world" testing, we need a packet forwarding application running on our SparcV8 processors. This application should periodically generate and process packets and provide metrics such as "generation time", "scheduling time" and "deadline".
It should also be possible to discard packets if the deadline is exceeded.

It is planned to implement this application within RTEMS.

Prerequisites

  • Experience in low-level programming (registers, timers, etc)
  • Experience with real time operating systems
  • Strong problem-solving skills, attention to detail, and the ability to work both independently and collaboratively in a team environment

Contact

michael.meidinger@tum.de
flo.maurer@tum.de

Supervisor:

Michael Meidinger, Florian Maurer

Rule-Based Reinforcement Learning in HW

Description

This Seminar should investigate, which attempts have been made to implement rule-based RL in HW /FPGAs since a first try in 2006: https://www.sciencedirect.com/science/article/pii/S1383762106000208

Contact

flo.maurer@tum.de

Supervisor:

Reward Assignment in Reinforcement Learning

Description

RL tries to maximies the reward over time.

Therefore, the way the reward is assigned to the agent plays a central role.

Often, the reward is assumed to be predetermined or certain functions are coming from nowhere.

This seminar should investigate reward assignment strategies to solve RL problems.

Contact

flo.maurer@tum.de

Supervisor:

Duckietown Autonomous Driving Pipeline - FPGA

Description

At LIS we want to use the Duckietown hardware and software ecosystem for experimenting with our reinforcement learning based learning classifier tables (LCT) as part of the control system of the Duckiebots: https://www.ce.cit.tum.de/lis/forschung/aktuelle-projekte/duckietown-lab/

More information on Duckietown can be found on https://www.duckietown.org/.

In this student work, we want to enable the use of the FPGA in the Lane Detection.
Therefore, the different stages of the Lande Detection Pipeline should be ported to FPGA.
In order to comunicate with the NVIDIA Jetson Nano Platform, the ported algorithm has to connect to the XILINX PCIE DMA IP-Core.

Prerequisites

  • Knowledge about VHDL and Xilinx IP-cores

Contact

flo.maurer@tum.de

Supervisor:

Duckietown Bring-Up

Description

At LIS we want to use the Duckietown hardware and software ecosystem for experimenting with our reinforcement learning based learning classifier tables (LCT) as part of the control system of the Duckiebots: https://www.ce.cit.tum.de/lis/forschung/aktuelle-projekte/duckietown-lab/

More information on Duckietown can be found on https://www.duckietown.org/.

Towards this goal, we need a (followup) working student who is improving the current infrastructure.

Towards this goal, the following three major tasks are necessary:

  1. Developping an infrastructure to track and visualize measurement data of the platform (e.g. CPU utilization) as well as the executed application.
  2. During this task also the source and periodicity of already provided data should be analyzed.
  3. Setting up all Duckiebots incl. all their features and a pipeline to reflash them in case it's needed.
  4. FPGA-Extension: Searching for a concept, as well as implementing it.
  5. Final goal: demonstration of data exchange between NVIDIA Jetson and FPGA including protocol to specify the type of transfered data

Contact

flo.maurer@tum.de

Supervisor:

Finished Work

  • Duckiebot Task Offloading to FPGA - Using Xilinx PCIe DMA IP, Python and Docker
    (Research Internship, Daniel Biser, 2024)
  • Simulation-Based Tuning of a MISO PI Controller for Autonomous Vehicle Applications
    (Bachelor Thesis, Hannes Vogel, 2023)
  • Implementing GPU-Accelerated Lane Detection Algorithm: GPU Performance Slower than CPU in Analysis
    (Research Internship, Jiang Shuai, 2023)
  • Revision of Learning Classifier Tables to Handle Temporarily Unachievable Goals
    (Master Thesis, Michael Meidinger, 2023)
  • Docker Maintanance for Duckietown
    (Working Student, Teodora Ljubevska, 2023)
  • Improved Line Segment Detection in Duckietown’s Autonomous Driving Pipeline
    (Bachelor Thesis, Matthias Schlemmer, 2023)
  • Implementation of Learning Classifier Tables for Power Reduction in Autonomous Driving Applications
    (Bachelor Thesis, Ethan Allan, 2023)
  • Extending Duckietown Robots Via Learning Classifier Tables: Optimization of Speed in Autonomous Driving
    (Bachelor Thesis, Zara Weir, 2023)
  • Development of a Simulation Model for RL-based Task Scheduling in Simulink
    (Bachelor Thesis, Diane Gerber, 2023)
  • Recognition of Unachievable Goals in Reinforcement Learning
    (Research Internship, Michael Meidinger, 2023)
  • Hardware in the Loop for Reinforcement Learning Investigation
    (Bachelor Thesis, Youssef Sharafaldin, 2023)
  • Reward Function Design for Reinforcement Learning
    (Bachelor Thesis, Lara Mehlsam, 2023)
  • Hardware Implementation of a Hybrid Reinforcement Learning Environment for Development and Demonstration
    (Bachelor Thesis, Yiming Lu, 2022)
  • Developer-Friendly Simulation Environment for Reinforcement Learning-Based MPSoC Runtime Optimization
    (Bachelor Thesis, Jakob Hölzl, 2022)
  • RTEMS on Leon3
    (Research Internship, Roberto Ruano Martinez, 2022)
  • Porting a Learning Classifier Table (LCT) for Processor Optimization from Hardware to Software and Evaluating its Usability
    (Research Internship, Moritz Thoma, 2022)
  • Analysis of Possible DVFS Periodicities in Self-Aware MPSoCs
    (Master Thesis, Thomas Hallermeier, 2022)
  • Development of a Self-Adaptive RL-Based Task Mapper for MPSoCs with Flexible Optimization Goals
    (Master Thesis, 2022)
  • Development of a User-Friendly Simulation Environment for RL-Based Optimization of MPSoC Runtime Parameters
    (Bachelor Thesis, Eric Christfreund, 2022)
  • Development of a Multi-Step Reinforcement Learning Approach for Autonomous DVFS on MPSoCs
    (Master Thesis, Lorenz Völk, 2021)
  • Development of a Cooperative Multi-Agent RL Approach for Autonomous DVFS on MPSoCs
    (Master Thesis, Klajd Zyla, 2021)
  • Enabling Multi-Core Capabilities in a DVFS Simulation Environment
    (Research Internship, 2021)
  • Application Scheduling on Self-aware Embedded Systems
    (Research Internship, Daniel Shkurti, 2021)
  • Development of a Debugger for a Reinforcement Learning Paradigm on an MPSoC
    (Research Internship, Klajd Zyla, 2021)
  • Development of a SoC Trace Generator on an FPGA for a Trace-Based Simulation Environment
    (Bachelor Thesis, Raphael Mayr, 2020)
  • Implementation of a Self-aware MPSoC Platform for Research on Cross-layer Resource Management
    (Working Student, Klajd Zyla, 2020)
  • Design of a Trace-Based DVFS Simulation Environment
    (Research Internship, Øivind Bakke, 2020)
  • Design of a Hardware-Based Debugger for a Self-Aware SoC Paradigm
    (Bachelor Thesis, Klajd Zyla, 2019)
  • Port of a Pedestrian Recognition Software on a VHDL MPSoC
    (Working Student, Ali Younessi, 2019)
  • HW-SW Interface Design for a Self-aware SoC Paradigm based on Hardware Machine Learning (IPF)
    (Research Internship, Ozan Sahin, 2019)

Former Seminar Topics

2023 WS

  • Challenges and Chances of Reinforcement Learning in Control Applications
  • Typen und Einsatzgebiete von Caches in Praktischen Anwendungen
  • A Survey on Types of Caching
  • A Survey on Safety Guarantee Mechanisms for the eXtended Classifier System
  • Cache Coherency Between Compute Nodes

2023 SS

  • Reinforcement Learning in Control Problems

2022 WS

  • Exploration the State-of-the-art System Resource Management and Future Direction for Multi-core Systems

2022 SS

  • Tools for Software Optimization
  • Survey on Model-Based Reinforcement Learning

2021 WS

  • Adaptive Embedded Systems based on Learning Classifier Systems
  • Evolution of P-state Transition Latencies in Modern x86 CPUs

2021 SS

  • Explainable AI: A Collection of Interpretable Machine Learning Approaches and Black-Box Explanation Techniques
  • Task and Communication Scheduling Mechanisms on NoC-based Platforms

2020 WS

  • Learning Classifier Systems in Multistep Reinforcement Learning Problems
  • Markov Decision Processes in the Context of Multi-step Learning

2020 SS

  • A Survey on Common MPSoC Simulators
  • Survey on Debugging Mechanisms for MPSoCs
  • A Qualitative Comparison of Common Benchmark Suits, Using Predefined Hardware Focused Metrics

2019 WS

  • Interplay of DVFS and DPM for energy minimization of multicore processors
  • Advancements in Learning Classifier Systems
  • Architectural Techniques for Runtime Power Optimization on MPSoCs
  • A Survey on Machine Learning Techniques Used for Predicting Hard Drive Failures in High Performance Centers

2019 SS

  • Comparison of Reinforcement Learning Based Multi Agent System Approaches
  • Distributed Reinforcement Learning Approaches
  • Power Optimization Methodes for MPSoCs

Publications

2024

  • Florian Maurer, Thomas Wild, Andreas Herkersdorf: Experiencing Self-Aware MPSoC Run-Time Optimization with Autonomous Bots. SelPhyS 2024, 2024 more… BibTeX

2023

  • Anmol Prakash Surhonne, Florian Maurer, Thomas Wild, Andreas Herkersdorf: LCT-TL: Learning Classifier Table (LCT) with Transfer Learning for run-time SoC performance-power optimization. 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC 2023), 2023 more… BibTeX
  • Anmol Prakash Surhonne, Florian Maurer, Thomas Wild, Andreas Herkersdorf: LCT-DER: Learning Classifier Table with Dynamic-sized Experience Replay for run-time SoC performance-power optimization. The Genetic and Evolutionary Computation Conference (GECCO), 2023 more… BibTeX Full text ( DOI )
  • Klajd Zyla, Florian Maurer, Thomas Wild, Andreas Herkersdorf: CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs. 36th GI/ITG International Conference on Architecture of Computing Systems, 2023 more… BibTeX Full text ( DOI )
  • Maurer, Florian; Thoma, Moritz; Surhonne, Anmol Prakash; Donyanavard, Bryan; Herkersdorf, Andreas: Machine Learning in Run-Time Control of Multicore Processor Systems. it - Information Technology 0 (0), 2023 more… BibTeX Full text ( DOI )
  • Nora Sperling, Alex Bendrick, Dominik Stöhrmann, Rolf Ernst, Bryan Donyanavard, Florian Maurer, Oliver Lenke, Anmol Surhonne, Andreas Herkersdorf, Walaa Amer, Caio Batista de Melo, Ping-Xiang Chen, Quang Anh Hoang, Rachid Karami, Biswadip Maity, Paul Nikolian, Mariam Rakka, Dongjoo Seo, Saehanseul Yi, Minjun Seo, Nikil Dutt, Fadi Kurdahi: Information Processing Factory 2.0 - Self-awareness for Autonomous Collaborative Systems. DATE 2023, 2023 more… BibTeX Full text ( DOI )

2022

  • Anmol Prakash Surhonne, Nguyen Anh Vu Doan, Florian Maurer, Thomas Wild, and Andreas Herkersdorf: GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization. Architecture of Computing Systems, 2022 more… BibTeX Full text ( DOI )

2020

  • Eberle Andrey Rambo; Bryan Donyanavard; Minjun Seo; Florian Maurer; Thawra Mohammad Kadeed; Caio Batista De Melo; Biswadip Maity; Anmol Surhonne; Andreas Herkersdorf; Fadi Kurdahi; Nikil D. Dutt; Rolf Ernst: The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing. IEEE Transactions on Emerging Topics in Computing, 2020, 1-1 more… BibTeX Full text ( DOI )
  • Florian Maurer, Bryan Donyanavard, Amir M. Rahmani, Nikil Dutt, Andreas Herkersdorf: Emergent Control of MPSoC Operation by a Hierarchical Supervisor / Reinforcement Learning Approach. DATE 2020, 2020 more… BibTeX Full text ( DOI )

2019

  • Donyanavard, Bryan; Sadighi, Armin; Maurer, Florian; Mück, Tiago; Rahmani, Amir M.; Herkersdorf, Andreas; Dutt, Nikil: SOSA: Self-Optimizing Learning with Self-Adaptive Control for Hierarchical System-on-Chip Management. Proceedings of the 52Nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '52), ACM, 2019 more… BibTeX Full text ( DOI )
  • Rambo, Eberle A.; Donyanavard, Bryan; Seo, Minjun; Maurer, Florian; Kadeed, Thawra; de Melo, Caio B.; Maity, Biswadip; Surhonne, Anmol; Herkersdorf, Andreas; Kurdahi, Fadi; Dutt, Nikil; Ernst, Rolf: The Information Processing Factory: Organization, Terminology, and Definitions. , 2019 more… BibTeX
  • Rambo, Eberle A.; Kadeed, Thawra; Ernst, Rolf; Seo, Minjun; Kurdahi, Fadi; Donyanavard, Bryan; de Melo, Caio Batista; Maity, Biswadip; Moazzemi, Kasra; Stewart, Kenneth; Yi, Saehanseul; Rahmani, Amir M.; Dutt, Nikil; Maurer, Florian; Doan, Nguyen Anh Vu; Surhonne, Anmol; Wild, Thomas; Herkersdorf, Andreas: The Information Processing Factory: A Paradigm for Life Cycle Management of Dependable Systems. ESweek, 2019 more… BibTeX Full text ( DOI )