Resource Optimization of a Hardware Accelerator
Description
Modern compute architectures increasingly rely on heterogeneous systems that combine general-purpose CPUs with dedicated hardware accelerators. These accelerators offer significant performance benefits and reduce CPU load, but require efficient interfaces and notification mechanisms to be fully effective. A proof-of-concept for hardware-assisted task notification has already been implemented and evaluated in a full-system simulation using Gem5.
This work builds on the existing framework and focuses on improving a hardware prototyping environment to evaluate these concepts on a real platform. The target system is an Xilinx Zynq board that integrates ARM multicore processors with FPGA-based programmable logic and runs a Linux-based software stack.
The main objective is to optimize the resources of an existing hardware unit. This includes analyzing resource usage (e.g., LUTs, BRAM, DSPs) and performance, identifying inefficiencies, and applying optimizations at the RTL and system level. The optimized design will be implemented and evaluated on the FPGA, with results compared to the baseline.
Tasks include:
- Analyzing the existing hardware design and identifying bottlenecks
- Implementing and validating resource optimizations
- Testing on the FPGA platform and evaluating results
- Documenting the work and findings
Prerequisites
To successfully complete this work, you should have:
- first experience with embedded programming,
- very good programming skills in System Verilog,
- basic knowledge about Git,
- first experience with the Linux environment.
The student is expected to be highly motivated and independent.
Supervisor:
Lars Nolte
2025
Bachelor's Theses
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10.03.2025
Comparison of Existing Inter-Process Communication Mechanisms in Linux
Supervisor:Lars Nolte
Master's Theses
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28.02.2025
Hardware-Assisted Event Notification for Packets Received at the NIC
Supervisor:Lars Nolte -
19.02.2025
Hardware-Accelerated Linux Kernel Tracing
Supervisor:Lars Nolte
Research Internships (Forschungspraxis)
-
13.03.2025
Implementation of a FPGA-based Intersatellite Network Switch for High-Speed Traffic
Supervisor:Lars Nolte, Michael Hanh (Airbus)
2024
Bachelor's Theses
-
24.01.2024
Interprocess Communication: Signal events in user space with ueventfd and upipe
Supervisor:Lars Nolte
Research Internships (Forschungspraxis)
-
15.02.2024
Multithreaded UDP Server und Parser für Tracing Daten in Rust
Supervisor:Lars Nolte
Interdisciplinary Projects
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17.07.2024
Development of a web application to control a hardware demonstration platform
Supervisor:Lars Nolte
2023
Bachelor's Theses
-
30.10.2023
Non-invasive integrated event tracing of FPGA via Ethernet
Supervisor:Lars Nolte -
08.09.2023
Non intrusive hardware tracing over ethernet
Supervisor:Lars Nolte -
20.06.2023
Optimization of Hardware Assisted Futex Implementation on Zynq Ultrascale+
Supervisor:Lars Nolte -
20.03.2023 Maximilian Grözinger
Digital Design and Validation of Hardware Assisted Futex - Implementation on Zynq Ultrascale+
Supervisor:Lars Nolte
Master's Theses
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22.05.2023
Hardware-assisting the User-Epoll mechanism in Linux
Supervisor:Lars Nolte -
30.03.2023
Optimizing high-speed network packet processing in Linux
Supervisor:Lars Nolte
Research Internships (Forschungspraxis)
-
20.12.2023
Setting up L4Re on a Raspberry Pi
Supervisor:Lars Nolte -
15.01.2023
Implementation of a Finite State Machine for Hardware Managed Futexes on Zynq Ultrascale+
Supervisor:Lars Nolte
2022
Bachelor's Theses
-
09.03.2022
Reduction of the Simulation Time of the Gem5 Simulator
Supervisor:Lars Nolte
Master's Theses
-
13.12.2022
Digital Design and Validation of a Futex Hardware Accelerator – Emulation on Zynq Ultrascale+
Supervisor:Lars Nolte
Research Internships (Forschungspraxis)
-
30.09.2022
Cache Coherent Hardware Accelerator Integration into an ARM Multicore Platform with a FPGA extension
Supervisor:Lars Nolte -
12.06.2022
Performance Improvement Evaluation of Hardware Accelerated Linux Thread Wake-ups
Supervisor:Lars Nolte
Seminars
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20.07.2022
[MSEI] A survey on asynchronous event notification mechanisms in Linux systems.
Supervisor:Lars Nolte -
28.01.2022
Survey on Linux Scheduler and Options to tweak an Application’s Performance
Supervisor:Lars Nolte
Student Assistant Jobs
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31.07.2022
Hardware Accelerator Integration into an ARM Multicore Platform with a FPGA extension
Supervisor:Lars Nolte
2021
Bachelor's Theses
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01.12.2021
Integration of Performance Counter into a simulation model of a hardware accelerator in Gem5.
Supervisor:Lars Nolte -
13.09.2021
Setup of an ARM Multicore Platform with a FPGA extension using a Xilinx Zynq Board and a Linux OS.
Supervisor:Lars Nolte -
06.07.2021
Low-intrusive Software Tracing and Profiling using a Gem5 Simulator
Supervisor:Lars Nolte -
06.07.2021
Low-intrusive Software Tracing and Profiling using a Gem5 Simulator
Supervisor:Lars Nolte
Master's Theses
-
13.12.2021
Development of a Generic Framework for Linux Task Offloading to Hardware on a Multicore Architecture.
Supervisor:Lars Nolte -
13.12.2021
Development of a Generic Framework for Linux Task Offloading to Hardware on a Multicore Architecture.
Supervisor:Lars Nolte
Research Internships (Forschungspraxis)
-
12.05.2021
Continuous Integration set up for a Gem5 Simulator project
Supervisor:Lars Nolte
Seminars
-
02.02.2021
Application Profiling Tools in Linux
Supervisor:Lars Nolte -
02.02.2021 Jonas Kirf
A Survey on Inter-Process Communication
Supervisor:Lars Nolte
2025
- ecoNIC: SmartNIC-assisted power management for networking workloads in Linux servers. Microprocessors and Microsystems 105209, 2025 more… BibTeX Full text ( DOI )
2024
- HW-EPOLL: Hardware-Assisted User Space Event Notification for Epoll Syscall. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation 2024, 2024 more… BibTeX
- POSTER: Hardware Assist for Linux IPC on an FPGA Platform. 21st ACM International Conference on Computing Frontiers, 2024 more… BibTeX Full text ( DOI )
- HASIIL: Hardware-Assisted Scheduling to Improve IPC Latency in Linux. 21st ACM International Conference on Computing Frontiers, 2024 more… BibTeX Full text ( DOI )
2023
- HAWEN: Hardware Accelerator for Thread Wake-Ups in Linux Event Notification. 2023 60th ACM/IEEE Design Automation Conference (DAC), 2023 more… BibTeX
- HW-FUTEX: Hardware-Assisted Futex Syscall. IEEE Transactions on Very Large Scale Integration Systems, 2023 more… BibTeX Full text ( DOI )
2022
2021
2020
- X-CEL: A Method to Estimate Near-Memory Acceleration Potential in Tile-based MPSoCs. ARCS 2020 - 33rd International Conference on Architecture of Computing Systems, 2020 more… BibTeX
- DySHARQ: Dynamic Software-Defined Hardware-Managed Queues for Tile-Based Architectures. International Journal of Parallel Programming, 2020 more… BibTeX Full text ( DOI )