HW/SW Codesign
| Lecturer (assistant) | |
|---|---|
| Duration | 3 SWS |
| Term | Sommersemester 2026 |
| Language of instruction | English |
- 09.07.2026 09:45-11:15 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
- 14.07.2026 08:45-09:30 Theresianum, 0606, Hörsaal ansteigend, ohne exp. B
- 16.07.2026 09:45-11:15 Theresianum, 0602, Hörsaal ansteigend, ohne exp. B
Admission information
See TUMonline
Note: Registration via TUMonline
Note: Registration via TUMonline
Description
The module covers the design flow from a system specification in form of function graphs down to FPGA netlists and executable object code for microprocessors with special focus on the partitioning of sub-functions into a software and a hardware part of a System-on-Chip (SoC). The major topics are: modeling and specification of mixed hardware/software solutions for embedded systems, graph partitioning and binding to execution units, scheduling of tasks, estimation of design quality.
Prerequisites
No specific requirements
Teaching and learning methods
The basic learning method is presentation during the lecture, supplemented with group discussions. During the tutorial the solution of example problems will be discussed. For a better understanding students will read scientific publications as self studies. Case studies will be discussed to get a practical understanding of the problems to be solved for HW/SW codesign of embedded systems / Systems-on-Chip.
The course will be taught in English.
The course will be taught in English.