Abouelkheir, Nour | FP: High-Performance Hardware Tracing of SmartNIC Packet Processing Pipelines | Marco Liess | |||||
Aygün, Mustafa | MA: Conception of a Real-Time Operating System (RTOS) for Motor Control Systems in the Field of Automotive Industry | Tim Twardzik | |||||
Baumann, Moritz | MA: Characterization and Analysis of Multicore Interference | Thomas Wild | |||||
Berkman, Alp | MA: Reliable Bootloader Verification and Validation Framework for NewSpace Satellite Control Units | Thomas Wild | |||||
Calabrò, Matteo | BA: Design and Integration of a Hardware Performance Counter Unit for Memory Access Statistics | Oliver Lenke | |||||
Chaowakarn, Krittin | BA: Duckietown - Real-Time Object Recognition for Autonomous Driving | Michael Meidinger | |||||
Dries, Christoph | BA: Duckietown - Improved RL-Based Speed Control | Michael Meidinger | |||||
Ettling, Theodor | BA: Design and Implementation of Dynamic Preloading Features on an FPGA Prototype | Oliver Lenke | |||||
Gebhart, Andreas | BA: Duckietown - Improved RL-based Vehicle Steering | Michael Meidinger | |||||
Hirte, Luc | BA: Packet Trace Replay for 100Gbps FPGA-based Network Tester | Marco Liess | |||||
Kartono, Johanes Andrian | MA: SmartNIC Hardware Extensions for Server State Tracking | Marco Liess | |||||
Lass, Timotheus | IP: Bereich Embedded Systems | Tim Twardzik | |||||
Li, Yuxuan | FP: Profiling-based Prefetcher Design | Yuanji Ye | |||||
Lima, Mateus | WS: Evaluations-Framework für eine SystemC MPSoC Prototyp Architektur | Oliver Lenke | |||||
Mahmalat, Firas | IDP: Linux Scheduler Implications for Load Balancing and Real-Time Networking | Marco Liess | |||||
Massart, Etienne | IDP: Linux Scheduler Implications for Load Balancing and Real-Time Networking | Marco Liess | |||||
Okano, Taiki | IDP: Linux Scheduler Implications for Load Balancing and Real-Time Networking | Marco Liess | |||||
Ritzhaupt-Kleissl, Annemarie | WS: Duckietown - Improved Distance Measurement | Michael Meidinger | |||||
Schärdinger, Matthias | IP: Bereich Embedded Systems | Thomas Wild | |||||
Schlemmer, Matthias | FP: High-Level Simulation of Chiplet Architectures | Michael Meidinger | |||||
Vasconcelos, Luís | WS: Duckietown - DuckieVisualizer Extension and System Maintenance | Michael Meidinger | |||||
Wang, Xinyan | FP: Localizing Automotive Diagnostic Solutions: Software Migration and PS/PL Interface Implementation on ZCU102 | Zafer Attal | |||||
Winterer, Jakob | FP: Prioritization Algorithms for a Page Preloading Mechanism | Oliver Lenke | |||||
Zamora, Robert | BA: Integration of a Hardware Preload Unit into an AXI-based CVA6 Architecture | Oliver Lenke | |||||
Zouaoui, Oussema | MA: Evaluation of the Software Stack Latency and Data Streaming Bandwidth for Signal Generation Purposes using a Xilinx Versal SoC | Thomas Wild |