Analyzing and understanding the memory access behaviors of applications are essential when optimizing computing systems and applications. One prominent example is the cache miss curve estimation, i.e., detecting the cache miss ratio as a function of the capacity using a memory access sequence.…
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Our paper "EtherTime: Cross-vendor Evaluation of PTP/NTP on Ethernet-based COTS Embedded Platforms" has been selected by the Award Committee as an outstanding paper at RTCSA25.
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The award is issued by the CIT student body (Fachschaft) for the best compulsory lecture in the Bachelor’s programme.
It is given for outstanding teaching performance and is the first prize which goes to a professor at CIT in Heilbronn.
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A paper titled "sys-sage: A Unified Representation of Dynamic Topologies & Attributes on HPC Systems" got accepted at ICS'24
Authors: Stepan Vanecek, Martin Schulz
Will be presented on the 7th June 2024 at the International Conference on Supercomputing (ICS'24) in Kyoto, Japan
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The paper from David Hildenbrand, Martin Schulz and Nadav Amit won a distinguished artifact award. It is freely accessible on the ACM Digital Library for one month.
Link.
https://asplos-conference.org/
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In the poster, "Anshul Jindal, Mohak Chadha, Michael Gerndt, Julian Frielinghaus, Vladimir Podolskiy and Pengfei Chen" present an extension of FaaS to…
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This paper presents and evaluates a graph-based, cache-aware multi-core approach for polynomial-based time integration of linear autonomous partial…
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This paper introduces and evaluates virtio-mem, a VIRTIO-based paravirtualized memory device, designed for fine-grained, NUMA-aware memory hot(un)plug…
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