Dirk Stober
(Research Assistant)
dirk.stober(at)tum.de
Boltzmannstr. 3
85748 Garching b. München
Room: 5606.01.033
Research Interest
- Memory Accesses on FPGAs
- Benchmarking and Optimization
- Configuring memory systems based on the RTL/HLS design
- High-Level Synthesis (HLS)
- Developing Accelerators
- Extracting accurate access graphs
- Integration of FPGAs
- Open-Source EDA tools
Teaching
I give a practical course, that I have designed as part of the BB-KI project during the Summer Semester, and a Seminar during the Winter Semester. You can find more information about the courses on the Chair’s website or by sending me an email.
Practical: Accelerating CNNs using PL (SS)
The course teaches the relevant skills for students to develop their own FPGA designs using HLS. It consists of a weekly lecture and accompanying labs. It is roughly split into the following blocks:
- Digital Design and FPGAs: Recaps Digital Design Basics and introduces building blocks of FPGAs. Students use SystemVerilog and Vivado to synthesize simple designs
- High-Level Synthesis: Main part of the course covers writing HLS code, simulation, implementation as well as integration on a Zynq board using XRT.
- Project Accelerating CNNs: Students accelerate a simple CNN starting from a provided C++ implementation. We use the PYNQZ2 board to implement the design
Seminar: Integration and Development of HW Accelerators (WS)
In the seminar students can pick between different topics, or suggest their own topics related to the area. Students prepare a literature survey or replicate parts of existing research, and present their results in form of a report, and a presentation.
Publications & Posters
- Cédric Léonard, Dirk Stober, Martin Schulz: FPGA-Enabled Machine Learning Applications in Earth Observation: A Systematic Review. ACM Comput. Surv. 58(11): 283:1-283:36 (2026)
- Dirk Stober, Martin Schulz: A Benchmarking Framework for SoC FPGAs Using a Programmable HLS Design (FPL 2025, Poster non-archival)
- Xiaorang Guo, Jonas Winklmann, Dirk Stober, Amr Elsharkawy, Martin Schulz: Design of an FPGA-Based Neutral Atom Rearrangement Accelerator for Quantum Computing. DATE 2025
- Gursch, A. M., Hasse, L., Stober, D., Trinitis, C., & Lucke, U. (2025). Action-Oriented Learning Design for AI Hardware Courses. SEFI 53rd Annual Conference (SEFI 2025), Tampere, Finland.