6G-life
With research beginning on the next generation of mobile communications 6G, TUM joins forces with TU Dresden in the BMBF funded project 6G-life to develop new approaches regarding sustainability, security, resilience and latency in mobile communications.
Hereby, LIS is engaged in exploring new architectures and architecture extensions for network interface cards (NICs) in processing nodes. This is part of the chairs endeavor to investigate how much intelligence can be brought to the network interface, taking into account the specific needs of certain networking domains and applications.
Research Focus
Many 6G applications, such as extended reality (XR) or autonomous driving, will require low latency control loops to be closed over the network, thereby requiring processing near the user and decision-making early in the data path. This leads to a large increase in Edge Computing and a growing amount of differently dimensioned, heterogenous processing nodes. Since changing user and application behaviour can exert very volatile traffic characteristics and processing requirements, such processing nodes have to interact with the network adaptively and energy-efficiently, also to avoid overprovisioning single nodes.
Therefore, we at LIS want to explore how to extract information on current traffic characteristics and processing requirements in the NIC and how to use this information to efficiently provision the servers processing resources and reflexively react to changing conditions. More concretely, this involves:
- designing a packet processing architecture with the required logic to extract information from incoming traffic
- performing power management of the host CPU and its heterogenous resources
- making processing decisions early in the data path, reducing the load on the CPU
and much more. We are prototyping these contributions on FPGA-based NICs in a multi-server testbed at our chair.
6G Testbed
The LIS 6G Testbed and Demonstrator consists of 2 AMD Epyc Server nodes and 4 AMD Ryzen PC nodes, which are equipped with several Xilinx FPGAs (NetFPGA SUME and Alveo), as well as commercial Intel NICs. They are used for prototyping 6G-specific SmartNIC extensions, providing proof-of-concept evaluation and demonstration in a physical networking testbed. The nodes can be used in a variety of ways, depending on the specific use case and evaluation setup. The figure on the right shows an exemplary representation of the nodes in a typical 6G use case.
Student Work
Offered Topics
Are you interested in contributing to 6G-life? If you don't find an interesting topic listed here, sometimes there is also the possibility to define a topic matching your specific interests. If you have questions about the 6G-life project and student works at our chair, please contact Marco Liess.
Ongoing
Linux Scheduler Implications for Load Balancing and Real-Time Networking
Description
With the advent of research on the next generation of mobile communications 6G, LIS is engaged in exploring architectures and architecture extensions for networking hardware, as well as improving the interaction between SmartNIC hardware, operating system, and application software. As 6G aims to support mission-critical applications, the demand for deterministic, real-time processing within network infrastructure has become paramount. The recent mainline integration of the real-time scheduler in Linux presents a unique opportunity to explore how operating system scheduling decisions directly impact networking performance in time-sensitive environments.
The incoming traffic load and with it the computing requirements on network processing nodes such as edge servers can span multiple magnitudes in a matter of milliseconds and less. This makes the task of load balancing and efficient scheduler decisions increasingly difficult, especially considering additional requirements like priority-awareness.
This thesis investigates the critical intersection of Linux scheduling policies and real-time networking performance. The research goals of this thesis include:
- Evaluating the performance implications of different Linux scheduling policies on networking performance
- Analyzing how scheduling decisions affect deterministic behavior in time-sensitive networking applications
- Assessing efficient load balancing mechanisms and the availability of priority-awareness for specific flows
- Identifying and potentially developing SmartNIC extensions to enhance Linux scheduling decisions
Prerequisites
- Good experience with Linux, Command Line Tools and Bash scripting
- Programming skills in C and Python
- Practical experience with the Linux Kernel, Kernel tracing functionality and low-level software
- Solid understanding of operating system concepts and hardware/software interactions
Contact
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Linux Scheduler Implications for Load Balancing and Real-Time Networking
Description
With the advent of research on the next generation of mobile communications 6G, LIS is engaged in exploring architectures and architecture extensions for networking hardware, as well as improving the interaction between SmartNIC hardware, operating system, and application software. As 6G aims to support mission-critical applications, the demand for deterministic, real-time processing within network infrastructure has become paramount. The recent mainline integration of the real-time scheduler in Linux presents a unique opportunity to explore how operating system scheduling decisions directly impact networking performance in time-sensitive environments.
The incoming traffic load and with it the computing requirements on network processing nodes such as edge servers can span multiple magnitudes in a matter of milliseconds and less. This makes the task of load balancing and efficient scheduler decisions increasingly difficult, especially considering additional requirements like priority-awareness.
This thesis investigates the critical intersection of Linux scheduling policies and real-time networking performance. The research goals of this thesis include:
- Evaluating the performance implications of different Linux scheduling policies on networking performance
- Analyzing how scheduling decisions affect deterministic behavior in time-sensitive networking applications
- Assessing efficient load balancing mechanisms and the availability of priority-awareness for specific flows
- Identifying and potentially developing SmartNIC extensions to enhance Linux scheduling decisions
Prerequisites
- Good experience with Linux, Command Line Tools and Bash scripting
- Programming skills in C and Python
- Practical experience with the Linux Kernel, Kernel tracing functionality and low-level software
- Solid understanding of operating system concepts and hardware/software interactions
Contact
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
High-Performance Hardware Tracing of SmartNIC Packet Processing Pipelines
Description
With the advent of research on the next generation of
mobile communications 6G, we are engaged in exploring
architecture extensions for Smart Network Interface Cards
(SmartNICs). To enable adaptive, energy-efficient and
low-latency network interfaces, we are prototyping a
custom packet processing pipeline on FPGA-based NICs,
partially based on the open-nic project
(https://github.com/Xilinx/open-nic).
Modern server architectures face constant challenges in
performance and energy efficiency. SmartNICs offer a
promising solution by offloading packet preprocessing and collecting real-time traffic analytics. These capabilities allow servers to dynamically adapt to changing network conditions and processing demands. However, operating at speeds of 100 Gbps generates massive data volumes that require sophisticated monitoring and debugging capabilities.
This thesis focuses on designing and implementing advanced hardware extensions for debugging and tracing SmartNIC packet processing pipelines using Hardware Description Language (HDL). The developed system will provide critical visibility into high-speed packet processing operations and monitoring logic.
- Developing trace collection mechanisms compatible with 100 Gbps line rates
- Engineering efficient solutions for capturing, moving, and storing large volumes of trace data
- Implementing strategies to avoid performance degradation during trace collection
- Applying suitable postprocessing and generating visualizations of key information
Prerequisites
- Programming skills in VHDL/Verilog, C, Python and preferably Rust
- Practical experience with FPGA Design and Implementation
- Good Knowledge of computer architecture, low-level software and OSI network model
- Comfortable with the Linux command line and bash
Contact
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Email: marco.liess@tum.de
Supervisor:
Linux Scheduler Implications for Load Balancing and Real-Time Networking
Description
With the advent of research on the next generation of mobile communications 6G, LIS is engaged in exploring architectures and architecture extensions for networking hardware, as well as improving the interaction between SmartNIC hardware, operating system, and application software. As 6G aims to support mission-critical applications, the demand for deterministic, real-time processing within network infrastructure has become paramount. The recent mainline integration of the real-time scheduler in Linux presents a unique opportunity to explore how operating system scheduling decisions directly impact networking performance in time-sensitive environments.
The incoming traffic load and with it the computing requirements on network processing nodes such as edge servers can span multiple magnitudes in a matter of milliseconds and less. This makes the task of load balancing and efficient scheduler decisions increasingly difficult, especially considering additional requirements like priority-awareness.
This thesis investigates the critical intersection of Linux scheduling policies and real-time networking performance. The research goals of this thesis include:
- Evaluating the performance implications of different Linux scheduling policies on networking performance
- Analyzing how scheduling decisions affect deterministic behavior in time-sensitive networking applications
- Assessing efficient load balancing mechanisms and the availability of priority-awareness for specific flows
- Identifying and potentially developing SmartNIC extensions to enhance Linux scheduling decisions
Prerequisites
- Good experience with Linux, Command Line Tools and Bash scripting
- Programming skills in C and Python
- Practical experience with the Linux Kernel, Kernel tracing functionality and low-level software
- Solid understanding of operating system concepts and hardware/software interactions
Contact
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Completed
Contact
Supervisor:
Contact
Marco Liess, M. Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Contact
Marco Liess, M. Sc.
Tel.: +49.89.289.23873
Email: marco.liess@tum.de
Supervisor:
Student
Contact
Marco Liess, M. Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Supervisor:
Student
Contact
Marco Liess, M. Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Contact
Marco Liess, M. Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Student
Contact
Marco Liess, M. Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Contact
Supervisor:
Contact
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Contact
Supervisor:
Contact
Marco Liess, M.Sc.
Tel.: +49.89.289.23873
Gebäude: N1 (Theresienstr. 90)
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Contact
Marco Liess, M.Sc.
Technische Universität München
Lehrstuhl für Integrierte Systeme
Arcisstr. 21, 80333 München
Tel.: +49.89.289.23873
Raum: N2139
Email: marco.liess@tum.de
Supervisor:
Publications
- ecoNIC: SmartNIC-assisted power management for networking workloads in Linux servers. Microprocessors and Microsystems, 2025 more… BibTeX Full text ( DOI )
- Reflex-based Wire-rate Traffic Steering and Dynamic Service Relocation in Smart Edge Network Interface Cards (SENIC). International Conference on Mobile and Miniaturized Terahertz Systems (ICM2TS), 2025 more… BibTeX Full text ( DOI )
- ecoNIC: Saving Energy through SmartNIC-based Load Balancing of Mixed-Critical Ethernet Traffic. 27th Euromicro Conference on Digital System Design (DSD) 2024, 2024 more… BibTeX Full text ( DOI )
- X-MAPE: Extending 6G-connected Self-adaptive Systems with Reflexive Actions. 2023 IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN), 2023 more… BibTeX Full text ( DOI )