Analyzing and understanding the memory access behaviors of applications are essential when optimizing computing systems and applications. One prominent example is the cache miss curve estimation, i.e., detecting the cache miss ratio as a function of the capacity using a memory access sequence.…
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Our paper "EtherTime: Cross-vendor Evaluation of PTP/NTP on Ethernet-based COTS Embedded Platforms" has been selected by the Award Committee as an outstanding paper at RTCSA25.
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The award is issued by the CIT student body (Fachschaft) for the best compulsory lecture in the Bachelor’s programme.
It is given for outstanding teaching performance and is the first prize which goes to a professor at CIT in Heilbronn.
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A paper titled "sys-sage: A Unified Representation of Dynamic Topologies & Attributes on HPC Systems" got accepted at ICS'24
Authors: Stepan Vanecek, Martin Schulz
Will be presented on the 7th June 2024 at the International Conference on Supercomputing (ICS'24) in Kyoto, Japan
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The paper from David Hildenbrand, Martin Schulz and Nadav Amit won a distinguished artifact award. It is freely accessible on the ACM Digital Library for one month.
Link.
https://asplos-conference.org/
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Im Projekt FaST (Dynamische Topologien in höchstskalierenden Umgebungen) wurde erforscht, wie durch Co-Scheduling die Effizienz von HPC-Systemen…
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Das BMBF Projekt Score-E (http://www.vi-hps.org/projects/score-e) hat in den letzten drei Jahren Methoden zur manuellen und automatischen Optimierung…
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Gastprofessor Shajulin Benedict von der St. Xaviers Universität in Indien hält die Vorlesung Cloud Computing und ein Praktikum zu diesem Thema in…
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On August 23, the 9th Workshop on UnConventional High Performance Computing 2016 (UCHPC 2016) took place together with Euro-Par 2016 at Grenoble, a…
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Im Juni veranstaltete die Akademie für Politische Bildung in Tutzing gemeinsam mit der Gesellschaft für Informatik die Tagung „Mündig in der smarten…
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