Utku Budak
M.Sc. Utku Budak
Technische Universität München
Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)
Postadresse
Arcisstrasse 21
80333 München
- Tel.: +49 89 289 28246
- Raum: 0101.Z1.014
- E-Mail: utku.budak@tum.de
Short CV
Utku Budak received his Bachelor’s and Master’s degrees in Electrical and Computer Engineering from Technical University of Munich. Since August 2023, he has been with the Chair of Security in Information Technology at Technical University of Munich, where he is pursuing his Ph.D. in cooperation with Siemens AG, Munich, Germany. His research interests include:
- Cyber Resilience
- Firmware Resilience
- Resilience Engine (RE)
- Secure Boot
- Device Identifier Composition Engine (DICE)
- Trusted Computing
- Post-Quantum Cryptography
Teaching
Embedded Systems and Security: WS26/27
Ringvorlesung Systemsicherheit: WS23/24, WS24/25, WS25/26
Advanced Cryptographic Implementations (Orga.): SS24, SS25, SS26
Publications
2026
Budak, U., De Santis, F., Peter Feist, C. (co-inventors), “Semiconductor chip with a firmware, firmware and industrial device,” European Patent Application EP4703931A1, published March 04, 2026.
Piccoli, A., Safieh, M., Aghaie, A., Fischer, K., & Budak, U. (co-inventors), “Method and apparatus for integrity testing of executable function of a device unit,” European Patent Application EP4682751A1, published Jan. 21, 2026.
2025
U. Budak, F. D. Santis, O. Yasar, M. Safieh and G. Sigl, "A Lightweight Firmware Resilience Engine for Real-Time Operating Systems," 2025 IEEE International Conference on Cyber Security and Resilience (CSR), Chania, Crete, Greece, 2025, pp. 401-406, doi: 10.1109/CSR64739.2025.11129996.
Budak, U., Safieh, M., De Santis, F., Sigl, G. (2025). A Cyber-Resilient DICE Architecture for Resource-Constrained Devices. In: Skopik, F., Naessens, V., De Sutter, B. (eds) Availability, Reliability and Security. ARES 2025. Lecture Notes in Computer Science, vol 15998. Springer, Cham. doi: 10.1007/978-3-032-00642-4_5.
2024
U. Budak, F. D. Santis and G. Sigl, "A Lightweight Firmware Resilience Engine for IoT Devices Leveraging Minimal Processor Features," 2024 IEEE International Conference on Cyber Security and Resilience (CSR), London, United Kingdom, 2024, pp. 486-491, doi: 10.1109/CSR61664.2024.10679408. (Best Paper Award)
Research Projects
- ReTruSt (Resilient, Trustworthy, Sustainable): The goal of ReTruSt is to research and test technological, as well as socio-technical, legal and economical solutions in order to make complex networked, highly dynamic, socio-technical systems trustworthy and resilient to cyber-attacks throughout their entire life cycle and to operate them in a verifiable, sustainably secure manner. (https://web.tum.de/en/inw/our-innovation-networks/retrust/)
- TRISTAN (Together for RISc-V Technology and ApplicatioNs): The TRISTAN consortium aims to expand, mature and industrialise the European RISC-V ecosystem to compete with existing commercial/proprietary alternatives. (https://tristan-project.eu/)
Open Positions for Students
If you are interested in working within one of my research domains for a HI-WI position, Bachelor's Thesis, Interdisciplinary Projects (IDP), Research Internships (Forschungspraxis), Master's Thesis, please feel free to contact me via E-Mail.
HI-WI/BA/FP/IDP:
- C/C++ Embedded Software/FIrmware Developer (ideally with knowledge in ARM or RISC-V)
- VHDL/FPGA Designer (ideally with knowledge in RISC-V)