Masterarbeiten
Secure Hardware & Confidential Computing (Co-supervised by Fraunhofer AISEC and TUM SEC)
Beschreibung
We are offering a joint opportunity for motivated students to work on innovative topics in hardware-assisted security and confidential computing. The work involves extending and integrating security mechanisms in modern processor and memory architectures, with a focus on improving trust and protection for data during execution.
You will support the analysis and design of security features for next-generation computing platforms, contribute to the integration of a hardware security component into existing Confidential VM Extensions, and explore how trust and authenticity can be established remotely.
The position preferably starts as a working student (HiWi) role and continues in a Master’s thesis, with flexibility to tailor the scope and depth accordingly.
Voraussetzungen
- Strong interest in system security, remote attestation, and computer architecture
- Experience with low-level programming (C/C++) and HDL (e.g., Verilog, VHDL) or willingness to acquire it
- Motivation to work on practical research problems
- Structured, independent work ethic and analytical skills
Curious to learn more about the topic? Reach out to us. We are happy to share additional insights and answer any questions!
Kontakt
jens.noepel(at)tum.de
Betreuer:
Securing Data-in-use (Co-supervision with FhG AISEC and TUM SEC)
Beschreibung
We are offering a master's thesis topic for a motivated student to work in system security and confidential computing, co-supervised by Fraunhofer AISEC and TUM SEC. The project focuses on enhancing protection mechanisms for sensitive data in memory during execution. You will analyze existing hardware-based security technologies, design novel solutions to address their limitations, and implement a proof-of-concept prototype.
Your tasks:
- Investigate and compare current approaches for data-in-use protection
- Design an improved security solution to prevent sophisticated memory-based attacks
- Develop a prototype solution that integrates both software and HDL components
- Conduct experimental evaluations to assess the performance and efficacy of the design
Voraussetzungen
- Strong interest in system security, confidential computing, and computer architecture
- Experience with low-level programming (C/C++) and HDL (e.g., Verilog, VHDL) or willingness to acquire it
- Familiarity with Linux, virtualization, or memory management is a plus
- Structured, independent work ethic and analytical skills
Curious to learn more about the master’s thesis topic? Reach out to us. We are happy to share additional insights and answer any questions!
Kontakt
jens.noepel(at)tum.de
Betreuer:
Studentische Hilfskräfte
Secure Hardware & Confidential Computing (Co-supervised by Fraunhofer AISEC and TUM SEC)
Beschreibung
We are offering a joint opportunity for motivated students to work on innovative topics in hardware-assisted security and confidential computing. The work involves extending and integrating security mechanisms in modern processor and memory architectures, with a focus on improving trust and protection for data during execution.
You will support the analysis and design of security features for next-generation computing platforms, contribute to the integration of a hardware security component into existing Confidential VM Extensions, and explore how trust and authenticity can be established remotely.
The position preferably starts as a working student (HiWi) role and continues in a Master’s thesis, with flexibility to tailor the scope and depth accordingly.
Voraussetzungen
- Strong interest in system security, remote attestation, and computer architecture
- Experience with low-level programming (C/C++) and HDL (e.g., Verilog, VHDL) or willingness to acquire it
- Motivation to work on practical research problems
- Structured, independent work ethic and analytical skills
Curious to learn more about the topic? Reach out to us. We are happy to share additional insights and answer any questions!
Kontakt
jens.noepel(at)tum.de