Real-world implementations of cryptographic algorithms necessarily have to consider physical effects. Side-channel leakages, such as the system’s power draw during the processing containing information about secret values, are a major design objective for today’s secure systems.

The underlying effects can be simple, such as state changes of bus wires effecting higher power draws due to wire capacitances, but can also have their roots in more complex interactions. An integrated circuit’s subsystems can influence each other, e.g. supply voltage fluctuations from a power side channel can transfer to an RF transmitter.

Crucially, interactions like these need to be known for the design of effective general-purpose countermeasure against such leakages.

The aim of this work is to replicate a published attack based on indirect emanations and to trace back the internal mechanisms of the apparent leakages through a series of hardware experiments. If carried out as a bachelor’s thesis, this topic focuses on the replication; for a research internship/master thesis, extending the work is possible.

Necessary: Either dependable knowledge of FPGA design and VHDL/Verilog or experience programming in Python
Necessary: Willingness to carry out experiments and measurement campaigns in our lab
Optional: Soldering skills
Optional: Basic understanding of cryptographics algorithms and side channel attacks

This work can either be conducted in German or in English. I am happy to provide more details and answer your questions upon request.

Real-world implementations of cryptographic algorithms necessarily have to consider physical effects. Side-channel leakages, such as the system’s power draw during the processing containing information about secret values, are a major design objective for today’s secure systems.

The underlying effects can be simple, such as state changes of bus wires effecting higher power draws due to wire capacitances, but can also have their roots in more complex interactions. An integrated circuit’s subsystems can influence each other, e.g. supply voltage fluctuations from a power side channel can transfer to an RF transmitter.

Crucially, interactions like these need to be known for the design of effective general-purpose countermeasure against such leakages.

The aim of this work is to replicate a published attack based on indirect emanations and to trace back the internal mechanisms of the apparent leakages through a series of hardware experiments. If carried out as a bachelor’s thesis, this topic focuses on the replication; for a research internship/master thesis, extending the work is possible.

Necessary: Either dependable knowledge of FPGA design and VHDL/Verilog or experience programming in Python
Necessary: Willingness to carry out experiments and measurement campaigns in our lab
Optional: Soldering skills
Optional: Basic understanding of cryptographics algorithms and side channel attacks

This work can either be conducted in German or in English. I am happy to provide more details and answer your questions upon request.

Real-world implementations of cryptographic algorithms necessarily have to consider physical effects. Side-channel leakages, such as the system’s power draw during the processing containing information about secret values, are a major design objective for today’s secure systems.

The underlying effects can be simple, such as state changes of bus wires effecting higher power draws due to wire capacitances, but can also have their roots in more complex interactions. An integrated circuit’s subsystems can influence each other, e.g. supply voltage fluctuations from a power side channel can transfer to an RF transmitter.

Crucially, interactions like these need to be known for the design of effective general-purpose countermeasure against such leakages.

The aim of this work is to replicate a published attack based on indirect emanations and to trace back the internal mechanisms of the apparent leakages through a series of hardware experiments. If carried out as a bachelor’s thesis, this topic focuses on the replication; for a research internship/master thesis, extending the work is possible.

Necessary: Either dependable knowledge of FPGA design and VHDL/Verilog or experience programming in Python
Necessary: Willingness to carry out experiments and measurement campaigns in our lab
Optional: Soldering skills
Optional: Basic understanding of cryptographics algorithms and side channel attacks

This work can either be conducted in German or in English. I am happy to provide more details and answer your questions upon request.