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Dr.-Ing. Michael Pehl
Technische Universität München
Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)
Dienstort
Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)
Work:
Theresienstr. 90(0101)/1.ZG
80333 München
- Tel.: (work pref) +49 (89) 289 - 28252
- Sprechstunde: Jederzeit nach Vereinbarung
- m.pehl@tum.de
Raum: N1013ZG
Short CV
Michael Pehl received his Dr.-Ing. degree in 2012 from the Technische Universität München. His thesis with title "Discrete Sizing of Analog Integrated Circuits" was carried out at the Institute for Electronic Design Automation and focused on the development of optimization algorithms for yield-aware analog sizing considering discrete design parameters. For this work he received the Kurt-Fischer Prize in 2013.
Since 2012 he is researcher and teaching associate at the Institute for Security in Information Technology. The focus of his current research is on the field of Physical Unclonable Functions (PUFs). Further research interests include topics like side channel analysis and tools to support secure design. He is teaching different courses as stated below.
Teaching Activities
Topics for Theses and Internships
Ongoing Theses and Internships
Implementation of a Loop PUF based Key Store for ASIC
Beschreibung
Betreuer:
List of Publications
2022
- Beware of the Bias -- Statistical Performance Evaluation of Higher-Order Alphabet PUFs. 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), IEEE, 2022Antwerp, Belgium mehr… BibTeX
- When the Decoder Has to Look Twice: Glitching a PUF Error Correction. IACR Transactions on Cryptographic Hardware and Embedded Systems 2022 (3), 2022 mehr… BibTeX
- Interleaved Challenge Loop PUF: A Highly Side-Channel Protected Oscillator-Based PUF. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 1-14 mehr… BibTeX
- On-Chip Side-Channel Analysis of the Loop PUF. Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware Security ASHES, Association for Computing Machinery, 2022Los Angeles, US mehr… BibTeX
2021
- Testing and Reliability Enhancement of Security Primitives. DFT 2021 34th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021Athens, Greece mehr… BibTeX
- Highly Reliable PUFs for Embedded Systems, Protected Against Tampering. Industrial Networks and Intelligent Systems, Springer International Publishing, 2021Hanoi, Vietnam mehr… BibTeX
- Machine Learning of Physical Unclonable Functions using Helper Data: Revealing a Pitfall in the Fuzzy Commitment Scheme. IACR Transactions on Cryptographic Hardware andEmbedded Systems 2021 (2), 2021, 1–36 mehr… BibTeX
- Analysis and Protection of the Two-Metric Helper Data Scheme. Constructive Side-Channel Analysis and Secure Design COSADE, Springer International Publishing, 2021Lugano, Switzerland mehr… BibTeX
2020
- PAG-IoT: A PUF and AEAD Enabled Trusted Hardware Gateway for IoT Devices. 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2020Limassol, CYPRUS mehr… BibTeX
- ROPAD: A Fully Digital Highly Predictive Ring Oscillator Probing Attempt Detector. 2020 57th ACM/EDAC/IEEE Design Automation Conference (DAC), 2020San Francisco, USA mehr… BibTeX
- Spatial Context Tree Weighting for Physical Unclonable Functions. 2020 European Conference on Circuit Theory and Design ECCTD, 2020Sofia, Bulgaria mehr… BibTeX
- Self-secured PUF: Protecting the Loop PUF by Masking. Constructive Side-Channel Analysis and Secure Design, Springer International Publishing, 2020 mehr… BibTeX
- Secure Update of FPGA-based Secure Elements using Partial Reconfiguration. TRUDEVICE 2020: Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, 2020Grenoble, France mehr… BibTeX
2019
- Efficient Bound for Conditional Min-Entropy of Physical Unclonable Functions Beyond IID. International Workshop on Information Forensics and Security 2019 (WIFS), 2019Delft, Netherlands, 1-6 mehr… BibTeX
- KeLiPUF: a key-distribution protocol for lightweight devices using Physical Unclonable Functions. In: 17th escar Europe : embedded security in cars (Konferenzveröffentlichung). 17th escar Europe : embedded security in cars (Konferenzveröffentlichung), 2019 mehr… BibTeX
- Towards memory integrity and authenticity of multi-processors system-on-chip using physical unclonable functions. it - Information Technology 61 (1), 2019, 29--43 mehr… BibTeX
- Side-Channel Analysis of the TERO PUF. Constructive Side-Channel Analysis and Secure Design COSADE , Springer International Publishing, 2019Darmstadt, Germany mehr… BibTeX
- On the Confidence in Bit-Alias Measurement of Physical Unclonable Functions. 17th IEEE International New Circuits and Systems Conference (NEWCAS), 2019München mehr… BibTeX
2018
- Bringing Analog Design Tools to Security: Modeling and Optimization of a Low Area Probing Detector. 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2018Prague, Czech Republic mehr… BibTeX
- SEPUFSoC: Using PUFs for Memory Integrity and Authentication in Multi-Processors System-on-Chip. ACM Great Lakes Symposium on VLSI, { GLSVLSI} 2018, 2018Chicago, USA mehr… BibTeX
- Where Technology Meets Security: Key Storage and Data Separation for System-on-Chips. ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC), 2018Dresden mehr… BibTeX
- Spatial Correlation Analysis on Physical Unclonable Functions. IEEE Transactions on Information Forensics and Security 13 (6), 2018, 1468-1480 mehr… BibTeX
2017
- Securing FPGA SoC Configurations Independent of Their Manufacturers. 30th IEEE International System-on-Chip Conference SOCC, 2017Munich, Germany mehr… BibTeX
- Secret Key Generation for Physical Unclonable Functions – Secret Key Generation and Authentication. In: Information Theoretic Security and Privacy of Information Systems. Cambridge University Press, 2017, 362-389 mehr… BibTeX
- EM Side-Channel Analysis of BCH-based Error Correction for PUF-based Key Generation. Proceedings of the 2017 Workshop on Attacks and Solutions in Hardware Security (ASHES '17), ACM, 2017New York, NY, USA mehr… BibTeX
- EM Attack on BCH-based Error Correction for PUFs. Cryptotag, 2017Nürnberg, Germany mehr… BibTeX
2016
- RRAM based random bit generation for hardware security applications. 2016 Conference on Design of Circuits and Integrated Systems (DCIS), 2016Granada, Spain mehr… BibTeX
- Algebraic Security Analysis of Key Generation with Physical Unclonable Functions. PROOFS 2016: Security Proofs for Embedded Systems , 2016Santa Barbara, CA, USA mehr… BibTeX
- Spatial Correlations in Physical Unclonable Functions. Final Conference on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE 2016), 2016Barcelona, Spain mehr… BibTeX
2015
- Fehlerkorrekturverfahren zur sicheren Schlüsselerzeugung mit Physical Unclonable Functions. Datenschutz und Datensicherheit - DuD (Volume 39, Issue 4, ), 2015, pp 229-233 mehr… BibTeX
- Systematic Low Leakage Coding for Physical Unclonable Functions. ACM Symposium on Information, Computer and Communications Security (ASIACCS), 2015Singapore mehr… BibTeX
- Efficient Evaluation of Physical Unclonable Functions Using Entropy Measures. Journal of Circuits, Systems and Computers (Vol. 25, No. 1 (2016) 1640001 ), 2015, 23 pages mehr… BibTeX
- Qualitätsevaluierung von Physical Unclonable Functions als Schlüsselspeicher. 14. Deutscher IT-Sicherheitskongress, 2015Bonn, Deutschland mehr… BibTeX
2014
- Herausforderungen der ganzheitlichen Absicherung eingebetteter Systeme. Datenschutz und Datensicherheit - DuD, 2014, Volume 38, Issue 11 , pp 757-761 mehr… BibTeX
- Advanced Performance Metrics for Physical Unclonable Functions. International Symposium on Integrated Circuits (ISIC), 2014Singapore mehr… BibTeX
- Statistic-based Security Analysis of Ring Oscillator PUFs. International Symposium on Integrated Circuits (ISIC), 2014Singapore mehr… BibTeX
2013
2012
2011
- An SQP and Branch-and-Bound Based Approach for Discrete Sizing of Analog Circuits – 13. In: Advances in Analog Circuits. InTech, 2011, 297-316 mehr… BibTeX
- Variability-Aware Automated Sizing of Analog Circuits Considering Discrete Design Parameters. International Symposium on Integrated Circuits (ISIC), 2011 mehr… BibTeX
2010
- Dimensionierung Analoger Schaltungen mit diskreten Parametern unter Verwendung eines Zufalls- und Gradientenbasierten Ansatzes. ITG/GMM-Fachtagung Entwurf von analogen Schaltungen mit CAE-Methoden (ANALOG), 2010 mehr… BibTeX
- Sizing Analog Circuits Using an SQP and Branch and Bound Based Approach. IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2010 mehr… BibTeX