Research Interests

• Cyber Resilience
• Firmware Resilience
• Resilience Engine (RE)
• Secure Boot
• Device Identifier Composition Engine (DICE)
• Trusted Computing

Teaching

Ringvorlesung Systemsicherheit: WS23/24, WS24/25, WS25/26

Advanced Cryptographic Implementations (Orga.): SS24, SS25

Publications

2025

U. Budak, F. D. Santis, O. Yasar, M. Safieh and G. Sigl, "A Lightweight Firmware Resilience Engine for Real-Time Operating Systems," 2025 IEEE International Conference on Cyber Security and Resilience (CSR), Chania, Crete, Greece, 2025, pp. 401-406, doi: 10.1109/CSR64739.2025.11129996.

Budak, U., Safieh, M., De Santis, F., Sigl, G. (2025). A Cyber-Resilient DICE Architecture for Resource-Constrained Devices. In: Skopik, F., Naessens, V., De Sutter, B. (eds) Availability, Reliability and Security. ARES 2025. Lecture Notes in Computer Science, vol 15998. Springer, Cham. https://doi.org/10.1007/978-3-032-00642-4_5.

2024

U. Budak, F. D. Santis and G. Sigl, "A Lightweight Firmware Resilience Engine for IoT Devices Leveraging Minimal Processor Features," 2024 IEEE International Conference on Cyber Security and Resilience (CSR), London, United Kingdom, 2024, pp. 486-491, doi: 10.1109/CSR61664.2024.10679408. (Best Paper Award)

Open Positions for Students

If you are interested in working within one of my research domains for a HI-WI position, Bachelor's Thesis, Interdisciplinary Projects (IDP), Research Internships (Forschungspraxis), Master's Thesis, please feel free to contact me via E-Mail.

HI-WI/BA/FP/IDP: 

• C/C++ Embedded Software/FIrmware Developer (ideally with knowledge in ARM or RISC-V)
• VHDL/FPGA Designer (ideally with knowledge in RISC-V)