Hardware Verification and FPGA Development for Experimental Setups
FPGA development hardware
To perform security assessments on devices, firmware and data typically need to be bootstrapped from the host PC to the device-under-test (DUT) by the means of debug, as well as several embedded communication interfaces. To streamline these setups, a novel hardware based around an FPGA has been developed, which awaits further testing and is eager to receive software.
The main focus is centered around flexibly bootstrapping custom ASICs, as well as off-the-shelf microcontrollers through SWD and JTAG. As means of interfacing the former, openOCD is used as a debug bridge.
We can offer you to either work on adding custom extensions to openOCD or developing hardware IP on FPGA. If you are eager, of course also both.
If you have any additional questions feel free to contact us!
openOCD Extension Development:
- Base knowledge in C
- Basic tcl scripting
- Base Verilog Knowledge
- You can read schematics and do basic hardware debugging
- Base python knowledge
Hardware Development for Security
hardware development security
Do you have hardware experience? We are looking for you!
- You are looking for a thesis, research internship or student assistant position?
- You know how to draw an orderly schematic?
- You know a thing or two about electronic component selection?
- You know op-amps not just from textbooks?
- You have laid out your own PCBs before?
- You are no stranger to soldering?
- You know not just SMD, but lots of other three-letter acronyms, too: ESL, FR-4, C0G, NP0, UJT, QFN, DFN, BGA ... ?
- You prefer to talk to microcontrollers (at the register level)?
- You can tell components apart from the smell of their magic smoke?
If you can at least tick a few boxes here and want to help us improve our lab and measurement for various hardware attacks, please contact us! We will ?nd a hardware-oriented security-adjacent topic together.