Bachelor's Theses
Individually Proposed Topics in Cryptography and Security
Description
Students interested in proposing their own research idea are welcome to do so within the broad areas of cryptography and security. Possible directions include Post-Quantum Cryptography, implementation security (e.g. side-channel and fault attacks, countermeasures), cryptographic system integration, and security at the system or network level.
Proposals should outline motivation, goals, relevant background, and a rough plan of the intended work. We will help refine and scope the idea to fit a seminar, bachelor thesis, IDP or FP.
Contact
If you are interested in proposing a topic, please contact Florian Grießer (florian.grieser@tum.de) with your idea and a recent grade report.
Supervisor:
Further topics in the area of PQC and SCA
Post-Quantum Cryptography, Side-Channel Attacks
Description
With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.
Possible topics in this area inlcude:
- New Side-Channel Attacks on PQC
- Innovative implementation approaches in Hardware
- Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
- Innovative Countermeasures against SCA
Prerequisites
- Good understanding of the properties relevant for Cryptographic implementations as e.g. taught in "Angewandte Kryptologie" and "Sichere Implementierung kryptographischer Verfahren"
- Good programming skills in Python
- Depending on the topic: Good programming skills in C, RISC-V assembly or ARM assembly
Contact
Feel free to contact Jonas Schupp (Jonas.Schupp@tum.de) in case you are interested in a topic in this area and include a recent grade report.
Supervisor:
Implementation of High-Assurance Cryptography
Description
Cryptographic implementations in high-level languages like C often suffer from compiler induced side-channel issue which allow e.g. to extract a secret key via the timing behaviour of the implementation. Implemeting in assembly is on the other hand error prone and laboursome. This topic is therefore about implementing and/or verifying certain aspects of a Post-Quantum Cryptographic algorithm in Jasmin [1]. Jasmin allows for exact control of the underlying hardware while providing more abstraction and support than pure assembly. It furthermore allows for formal proofs of the implemented algorithm.
[1]: https://github.com/jasmin-lang/jasmin
Prerequisites
- Programming skills in C and either x86 or ARM (Thumb) assembly
- Basic understanding of (timing) side-channels
- Knowledge of a formal proof system/assitant
Contact
In case you are interested, contact Jonas Schupp (Jonas.Schupp@tum.de) and include a recent grade report.
Supervisor:
Digital Hardware Design and Evaluation
Description
I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.
Possible implementation tasks are the
- Extension/implementation of symmetric ciphers
- Extension/implementation of message authentication codes
- Extension/implementation of error correction codes/functionality
The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.
If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.
Supervisor:
Master's Theses
ARM TrustZone Basierte Sicherheitsforensik für Kompromittierte Anwendungen
Description
Tätigkeitsbeschreibung
Die ARM TrustZone bietet eine bew¨ahrte Ausf ¨uhrungsumgebung (Trusted Execution Environment,
TEE), um sicherheitskritische Anwendungen getrennt vom prim¨aren Betriebssystem
(OS) in eine kontrollierte Umgebung auszulagern. In diesem Zusammenhang
findet die Ausf ¨uhrung komplexer Programme in der Regel in der “normalen Welt” statt,
w¨ahrend minimale und hochgradig vertrauensw¨urdige Programme in der “sicheren Welt”
isoliert werden. In einer Vielzahl von Ver¨ offentlichungen wurde bereits nachgewiesen,
dass diese Trennung zur U¨ berwachung der normalen Welt genutzt werden kann. Typische
Ansa¨ tze implementieren eine Art von U¨ berwachung, indem das prima¨ re Betriebssystem
w¨ahrend der Laufzeit aus der sicheren Welt heraus analysiert wird. Ein weitl ¨aufiges Problem
dabei ist, dass diese Ans¨ atze durch die Ressourcen der sicheren Welt begrenzt sind
und k¨onnen w¨ahrend der Laufzeit keine Beweise f ¨ ur Folgeuntersuchungen liefern.
Ein neuartiger Ansatz best¨unde darin, die Privilegien der sicheren Welt in der ARM
TrustZone zu nutzen, um die normale Welt effektiv einzufrieren und einen forensischen
Schnappschuss des potenziell kompromittierten Systems zu erstellen. Dies erfordert
einen Mechanismus, um die normale Welt von der weiteren Ausf ¨uhrung von Programmen
abzuhalten, und zus¨ atzlich die Entwicklung eines Mechanismus zur sicheren Speicherung
oder U¨ bertragung des forensischen Schnappschusses des Arbeitsspeichers.
Die Aufgaben f ¨ ur die Abschlussarbeit umfassen:
• Analyse von verwandten Arbeiten zur Anfertigung von Speicherabbildungen innerhalb
der sicheren Welt.
• Erarbeitung eines Konzeptes zur sicheren U¨ bertragung bzw. Ablage des Schnappschusses
ohne die Verwendung von Ressourcen aus der normalen Welt.
• Bedrohungsmodellierung des entworfenen Designs anhand verschiedener Angriffspfade.
• Implementierung einer Trusted Application (TA) f ¨ ur OP-Tee zum Anhalten der normalen
Welt und Anfertigung von Schnappsch¨ussen des Arbeitsspeichers.
Anforderungen
• Hohe Motivation sowie selbstst ¨andige und zielorientierte Arbeitsweise
• Gute Programmierkenntnisse in C/C++ oder Grundlagen in Rust
• Praxiserfahrung im Umgang mit Linux-basierten Betriebssystemen
• Grundkenntnisse zu Trusted Execution Environments wie OP-TEE
Der Prototyp soll f ¨ ur die ARM Fixed Virtual Platforms (FVPs) entwickelt werden, sodass
keine direkte Hardware-Abh¨angigkeit besteht und auch remote bearbeitet werden kann.
Contact
Kontakt
Bitte senden Sie Ihre Unterlagen (mit Lebenslauf und aktuellem Notenbogen) an:
Lukas F¨ ureder
Fraunhofer-Institut f ¨ ur Angewandte und Integrierte Sicherheit (AISEC)
Secure Operating Systems
Lichtenbergstr. 11, 85748 Garching
Mail: lukas.fuereder@aisec.fraunhofer.de
Phone: +49 89 322-9986-1030
oder
Albert Stark
Fraunhofer-Institut f ¨ ur Angewandte und Integrierte Sicherheit (AISEC)
Secure Operating Systems
Lichtenbergstr. 11, 85748 Garching
Mail: albert.stark@aisec.fraunhofer.de
Phone: +49 89 322-9986-1038
Ausschreibungsdatum: 15.09.2025
Supervisor:
Further topics in the area of PQC and SCA
Post-Quantum Cryptography, Side-Channel Attacks
Description
With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.
Possible topics in this area inlcude:
- New Side-Channel Attacks on PQC
- Innovative implementation approaches in Hardware
- Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
- Innovative Countermeasures against SCA
Prerequisites
- Good understanding of the properties relevant for Cryptographic implementations as e.g. taught in "Angewandte Kryptologie" and "Sichere Implementierung kryptographischer Verfahren"
- Good programming skills in Python
- Depending on the topic: Good programming skills in C, RISC-V assembly or ARM assembly
Contact
Feel free to contact Jonas Schupp (Jonas.Schupp@tum.de) in case you are interested in a topic in this area and include a recent grade report.
Supervisor:
Implementation of High-Assurance Cryptography
Description
Cryptographic implementations in high-level languages like C often suffer from compiler induced side-channel issue which allow e.g. to extract a secret key via the timing behaviour of the implementation. Implemeting in assembly is on the other hand error prone and laboursome. This topic is therefore about implementing and/or verifying certain aspects of a Post-Quantum Cryptographic algorithm in Jasmin [1]. Jasmin allows for exact control of the underlying hardware while providing more abstraction and support than pure assembly. It furthermore allows for formal proofs of the implemented algorithm.
[1]: https://github.com/jasmin-lang/jasmin
Prerequisites
- Programming skills in C and either x86 or ARM (Thumb) assembly
- Basic understanding of (timing) side-channels
- Knowledge of a formal proof system/assitant
Contact
In case you are interested, contact Jonas Schupp (Jonas.Schupp@tum.de) and include a recent grade report.
Supervisor:
Digital Hardware Design and Evaluation
Description
I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.
Possible implementation tasks are the
- Extension/implementation of symmetric ciphers
- Extension/implementation of message authentication codes
- Extension/implementation of error correction codes/functionality
The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.
If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.
Supervisor:
Interdisciplinary Projects
Individually Proposed Topics in Cryptography and Security
Description
Students interested in proposing their own research idea are welcome to do so within the broad areas of cryptography and security. Possible directions include Post-Quantum Cryptography, implementation security (e.g. side-channel and fault attacks, countermeasures), cryptographic system integration, and security at the system or network level.
Proposals should outline motivation, goals, relevant background, and a rough plan of the intended work. We will help refine and scope the idea to fit a seminar, bachelor thesis, IDP or FP.
Contact
If you are interested in proposing a topic, please contact Florian Grießer (florian.grieser@tum.de) with your idea and a recent grade report.
Supervisor:
Further topics in the area of PQC and SCA
Post-Quantum Cryptography, Side-Channel Attacks
Description
With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.
Possible topics in this area inlcude:
- New Side-Channel Attacks on PQC
- Innovative implementation approaches in Hardware
- Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
- Innovative Countermeasures against SCA
Prerequisites
- Good understanding of the properties relevant for Cryptographic implementations as e.g. taught in "Angewandte Kryptologie" and "Sichere Implementierung kryptographischer Verfahren"
- Good programming skills in Python
- Depending on the topic: Good programming skills in C, RISC-V assembly or ARM assembly
Contact
Feel free to contact Jonas Schupp (Jonas.Schupp@tum.de) in case you are interested in a topic in this area and include a recent grade report.
Supervisor:
Implementation of High-Assurance Cryptography
Description
Cryptographic implementations in high-level languages like C often suffer from compiler induced side-channel issue which allow e.g. to extract a secret key via the timing behaviour of the implementation. Implemeting in assembly is on the other hand error prone and laboursome. This topic is therefore about implementing and/or verifying certain aspects of a Post-Quantum Cryptographic algorithm in Jasmin [1]. Jasmin allows for exact control of the underlying hardware while providing more abstraction and support than pure assembly. It furthermore allows for formal proofs of the implemented algorithm.
[1]: https://github.com/jasmin-lang/jasmin
Prerequisites
- Programming skills in C and either x86 or ARM (Thumb) assembly
- Basic understanding of (timing) side-channels
- Knowledge of a formal proof system/assitant
Contact
In case you are interested, contact Jonas Schupp (Jonas.Schupp@tum.de) and include a recent grade report.
Supervisor:
Research Internships (Forschungspraxis)
Error Correction Code Decoders: Machine Learning-Based Approaches
Description
In principle, an artificial neural network (ANN) can be trained to closely approximate any function. Progress in the domain of machine learning (ML) has shown that this universal approximation of functions has not only theoretical, but also practical relevance.
Error correction codes (ECCs) map information to a larger space, adding redunandancy so that the original information can be recovered despite erroneous data transmission. To decode a received data word and correct transmission errors, typically bespoke classical algorithms are used.
In principle, an ANN could be used in place of a classical decoding algorithm and prior research has shown that this specific application is indeed possible. The goal of this work is to look into this idea in more detail by
- doing a literature search on ML-based ECC decoders,
- assessing the feasibility of adapting the structure of an ANN to different ECCs, and possibly
- conducting practical experiments by training and evaluating such a decoder.
Prerequisites
- Beneficial: General concepts of error correcting codes
- Beneficial: First experiences with machine learning in practice
Contact
If you are interested in this work, please contact me via email with a short CV and grade report. We will then arrange a short meeting where we can discuss the details.
Jonas Ruchti, M.Sc.
Technical University of Munich, Chair of Security in Information Technology
Room N1010
E-Mail: j.ruchti@tum.de
Supervisor:
Analyzing Weight Distributions (in BIKE) via Syndrome Information
Description
BIKE (Bit Flipping Key Encapsulation) is a post-quantum key exchange scheme based on quasi-cyclic moderate-density parity-check (QC-MDPC) codes. Security relies on the hardness of decoding random linear codes, where an attacker only knows the public matrix H, the syndrome s, and the exact weight of the error vector.
In this project the student will generate large datasets of BIKE ciphertexts and corresponding error vectors, and design experiments to analyze whether the weight (or distribution) of the error vector can be predicted directly from the syndrome and the parity-check matrix.
This includes:
-
Implementing dataset generation with fixed public keys and varying error vectors
-
Designing statistical or machine-learning based approaches to estimate error weights
-
Evaluating how predictable the error structure is and whether such predictability could weaken BIKE’s assumed hardness
Prerequisites
-
Good understanding of (code-based) cryptography basics
-
Programming skills in Python or C.
-
Interest in post-quantum cryptography and side-channel/security analysis.
Contact
florian.griesser@tum.de
Supervisor:
Individually Proposed Topics in Cryptography and Security
Description
Students interested in proposing their own research idea are welcome to do so within the broad areas of cryptography and security. Possible directions include Post-Quantum Cryptography, implementation security (e.g. side-channel and fault attacks, countermeasures), cryptographic system integration, and security at the system or network level.
Proposals should outline motivation, goals, relevant background, and a rough plan of the intended work. We will help refine and scope the idea to fit a seminar, bachelor thesis, IDP or FP.
Contact
If you are interested in proposing a topic, please contact Florian Grießer (florian.grieser@tum.de) with your idea and a recent grade report.
Supervisor:
Further topics in the area of PQC and SCA
Post-Quantum Cryptography, Side-Channel Attacks
Description
With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.
Possible topics in this area inlcude:
- New Side-Channel Attacks on PQC
- Innovative implementation approaches in Hardware
- Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
- Innovative Countermeasures against SCA
Prerequisites
- Good understanding of the properties relevant for Cryptographic implementations as e.g. taught in "Angewandte Kryptologie" and "Sichere Implementierung kryptographischer Verfahren"
- Good programming skills in Python
- Depending on the topic: Good programming skills in C, RISC-V assembly or ARM assembly
Contact
Feel free to contact Jonas Schupp (Jonas.Schupp@tum.de) in case you are interested in a topic in this area and include a recent grade report.
Supervisor:
Implementation of High-Assurance Cryptography
Description
Cryptographic implementations in high-level languages like C often suffer from compiler induced side-channel issue which allow e.g. to extract a secret key via the timing behaviour of the implementation. Implemeting in assembly is on the other hand error prone and laboursome. This topic is therefore about implementing and/or verifying certain aspects of a Post-Quantum Cryptographic algorithm in Jasmin [1]. Jasmin allows for exact control of the underlying hardware while providing more abstraction and support than pure assembly. It furthermore allows for formal proofs of the implemented algorithm.
[1]: https://github.com/jasmin-lang/jasmin
Prerequisites
- Programming skills in C and either x86 or ARM (Thumb) assembly
- Basic understanding of (timing) side-channels
- Knowledge of a formal proof system/assitant
Contact
In case you are interested, contact Jonas Schupp (Jonas.Schupp@tum.de) and include a recent grade report.
Supervisor:
Digital Hardware Design and Evaluation
Description
I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.
Possible implementation tasks are the
- Extension/implementation of symmetric ciphers
- Extension/implementation of message authentication codes
- Extension/implementation of error correction codes/functionality
The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.
If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.
Supervisor:
Student Assistant Jobs
Tutor*in für die Vorlesung „Grundlagen der IT-Sicherheit“
Description
Es gibt einen Praktikumsteil zur Vorlesung, in dem verschiedene
Aspekte der IT-Sicherheit mithilfe eines eigenen Linux-Systems
und verschiedener Server-VMs praktisch geübt werden.
Deine Hauptaufgabe als Tutor*in sollte es sein, die
Studierenden während der Tutorstunden (2× wöchtentlich
à 1½ h) vor Ort bei der Bearbeitung dieser Aufgaben zu
unterstützen.
Daneben kannst du an der Wartung und Weiterentwicklung
der Aufgaben mitwirken und diese kreativ mitgestalten. Es gibt
stets Verbesserungspotential, was Verlässlichkeit und Inhalte
angeht!
Du solltest solide Linux-Kenntnisse mitbringen, da du häufig
Studierende, die vor der Vorlesung noch keinen Kontakt mit
Linux hatten, bei der Fehlersuche unterstützen wirst. Ein Besuch
der Vorlesung ist von Vorteil, aber keine zwingende
Voraussetzung.
Die Anstellung beläuft sich auf 6 h/Woche während der Vorlesungszeit im Wintersemester.
Contact
Bewirb dich bei Interesse mit einer kurzen E-Mail an j.ruchti@tum.de.
Supervisor:
Side Channel Analysis on FPGA Targets (AISEC)
Description
Task Description:
Side-channel analysis is an established research field which exploits unintended signal emanations of hardware that processes secret information. An attacker may be able to gain access to processed secrets by observing the electromagnetic (EM) field of a microcontroller that executes a cryptographic algorithm. In this work you will perform side-channel leakage analysis on an FPGA target in one of our state of the art hardware security laboratories. You will assist in all steps from experiment design, firmware development, measurements and finally data analysis.
Within this work, you will:
• implement FPGA firmware for the experiments
• evaluate side-channel leakage behavior.
• perform measurements of the EM side channel in our state-of-the art hardware security lab.
•evaluate the measurements
• write code to integrate the FPGA target into our automated measurement framework.
Prerequisites
Requirements:
• First experience in FPGA programming using VHDL (or SystemVerilog)
• Motivation to learn VHDL (or SystemVerilog)
• Motivation to conduct measurements in our lab
• Good Programming Skills in Python
• Prior knowledge in security is beneficial but not required
Contact
Contact Please send your application with current CV and transcript of records via e-mail to: Oliver Butowski Fraunhofer Institute for Applied and Integrated Security (AISEC) Hardware Security Lichtenbergstr. 11, 85748 Garching near Munich Mail: oliver.butowski@aisec.fraunhofer.de (If you wish to encrypt your e-mail you may find my SMIME certificate here.) Publication Date: 17.02.2025
Supervisor:
Further topics in the area of PQC and SCA
Post-Quantum Cryptography, Side-Channel Attacks
Description
With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.
Possible topics in this area inlcude:
- New Side-Channel Attacks on PQC
- Innovative implementation approaches in Hardware
- Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
- Innovative Countermeasures against SCA
Prerequisites
- Good understanding of the properties relevant for Cryptographic implementations as e.g. taught in "Angewandte Kryptologie" and "Sichere Implementierung kryptographischer Verfahren"
- Good programming skills in Python
- Depending on the topic: Good programming skills in C, RISC-V assembly or ARM assembly
Contact
Feel free to contact Jonas Schupp (Jonas.Schupp@tum.de) in case you are interested in a topic in this area and include a recent grade report.
Supervisor:
Digital Hardware Design and Evaluation
Description
I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.
Possible implementation tasks are the
- Extension/implementation of symmetric ciphers
- Extension/implementation of message authentication codes
- Extension/implementation of error correction codes/functionality
The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.
If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.