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Note: Only for students in the MSMCD program.

The content of this module is the creation of a physical design from the gate netlist of a digital circuit. Current design methods and design tools (e.g. for automated placement and routing) are used, such as those provided by the commercial providers Cadence or Synopsis. Students develop the scripts required to carry out the design process (for example in the TCL scripting language commonly used in design automation) and work through the individual steps of the physical design flow, which essentially consist of the following sub-steps: Floorplanning, Placement and Routing, Clock Tree Synthesis, Timing Closure, Power Optmization, Design for Manufacturability and Physical Verification and Signoff. Students come into contact with design rules (e.g., regarding placement and alignment of logic cells) for the technology used and learn to control the design process in such a way that these design rules are adhered to.
Manufacturer-specific standard cell libraries and process design kits (PDKs) are used for the steps required to create a chip suitable for production. For current industry-relevant technology nodes, one of which is also to be used in the planned chip manufacturing in the practical course, special license and non-disclosure agreements must be accepted for access to this data and must be signed by students. Students who do not wish to sign such agreements can alternatively work with a provided open source PDK or a PDK modified for teaching purposes, for which no signature is required. In this case, however, it will likely not be possible to produce the chip. The targeted learning objectives can be achieved in both cases and independent from the used PDK.

Research Laboratory Functional Design of Integrated Digital Circuits

In this module, students working in groups are given the task of converting a netlist, which was developed by the same group in the “Research Laboratory Functional Design of Integrated Digital Circuits”, for example, into a description that can then be taped out. Typical specifications such as area or target frequency must be fulfilled. The students deal with a sub-area of a more complex circuit and consider the design rules for a given production technology for this sub-area. The students also develop tests to ensure the functionality of the circuit and compliance with the specifications after the back-end design.