Michael Pehl received his Dr.-Ing. degree (summa cum laude) in 2012 from the Technische Universität München. His thesis with title "Discrete Sizing of Analog Integrated Circuits" was carried out at the Institute for Electronic Design Automation and focused on the development of optimization algorithms for yield-aware analog sizing considering discrete design parameters. For this work he received the Kurt-Fischer Prize in 2013. Since 2012 he is researcher and teaching associate at the Institute for Security in Information Technology and currently holds the position of an academic senior counillor (Akad. ORat). He leads a research group on Hardware-Intrinsic Security and focuses his current research on Physical Unclonable Functions (PUFs). Further research interests include topics like side channel analysis and tools to support secure design. He teaches a number of different courses as stated below. His research interests include PUFs, TRNGs, Side-Channel Analysis and Fault Injection and corresponding countermeasures, and secure design. He is member of the Center of Competence for Design of Electronic Circuits and Systems (DECS) at TUM. From 2014 until 2022 he was also board member of the graduate center of the previous Department of Electrical and Computer Engineering at the Technical University of Munich.
Side-Channel Analysis of Error-Correcting Codes for PUFs
Description
Physical Unclonable Functions (PUFs) exploit manufacturing process variations to generate unique signatures. PUF and error-correcting codes can be joined together to reliably generate cryptographically strong keys. However, the implementation of error-correcting codes is prone to physical attacks like side-channel attacks. Side-channel attacks exploit the information leaked during the computation of secret intermediate states to recover the secret key. Therefore, the implementation of error-correcting codes must also involve the implementation of proper countermeasures against side-channel attacks.
The goal of this thesis is to evaluate the side-channel resistance of a secure implementation of error-correcting codes for PUFs on FPGA. The thesis consists of the following steps:
Get familiar with currently available implementations of error-correcting codes for PUFs
Adapt and improve current implementations (VHDL)
Develop a measurement setup for side-channel analysis (Matlab/Python)
Perform side-channel analysis using the state-of-the-art EMF measurement equipment in our lab (Oscilloscope knowledge + Matlab/Python required)
Prerequisites
The ideal candidate should have:
Previous experience in field of digital design (VHDL/Vivado/Xilinx FPGA)
Basic knowledge on using lab equipment (e.g Oscilloscope,...)
Basic knowledge in statistics
Good programming skills in Matlab/Python
Attendance at the lecture “Secure Implementation of Cryptographic Algorithms” is advantageous
Program Committee Member of DATE 2024, AsianHOST 2023, COSADE 2022, Trudevice Workshop 2020 and 2016
Reviewer for IEEE Access, IEEE Transactions on Circuits and Systems, IEEE Transactions on Information Forensics and Security, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Journal of Cryptographic Engineering, and others.
Project
Role
Funding Agency
From - Until
STAMPS-PLUS
PI
DFG
03/2024-02/2027
Joint Education for Advanced Chip Design in Europe (Edu4Chip)
Lippmann, Bernhard and Hatsch, Joel and Seidl, Stefan and Houdeau, Detlef and Subrahmanyam, Niranjana Papagudi and Schneider, Daniel and Safieh, Malek and Passarelli, Anne and Maftun, Aliza and Brunner, Michaela and Music, Tim and Pehl, Michael and Siddiqui, Tauseef and Brederlow, Ralf and Schlichtmann, Ulf and Driemeyer, Bjoern and Ortmanns, Maurits and Hesselbarth, Robert and Hiller, Matthias: VE-FIDES: Designing Trustworthy Supply Chains Using Innovative Fingerprinting Implementations. 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2023 more…BibTeX
Riehm, Carl and Frisch, Christoph and Burcea, Florin and Hiller, Matthias and Pehl, Michael and Brederlow, Ralf: Structured Design and Evaluation of a Resistor-Based PUF Robust Against PVT-Variations. 2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2023Tallin, Estonia, 93--98 more…BibTeX
2022
Frisch, Christoph; Pehl, Michael: Beware of the Bias -- Statistical Performance Evaluation of Higher-Order Alphabet PUFs. 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), IEEE, 2022Antwerp, Belgiummore…BibTeX
Kestel, Claus and Frisch, Christoph and Pehl, Michael and Wehn, Norbert: Towards More Secure PUF Applications: A Low-Area Polar Decoder Implementation. 2022 IEEE 35th International System-on-Chip Conference (SOCC), 2022 more…BibTeX
Moghadas, Seyed Hamidreza and Pehl, Michael and Sigl, Georg: ROPAD+: Enhancing the Digital Ring Oscillator Probing Attempt Detector for Protecting Irregular Data Buses. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (01), 2022, 1--12 more…BibTeX
Ruchti, Jonas; Gruber, Michael; Pehl, Michael: When the Decoder Has to Look Twice: Glitching a PUF Error Correction. IACR Transactions on Cryptographic Hardware and Embedded Systems 2022 (3), 2022 more…BibTeX
Tebelmann, Lars and Danger, Jean-Luc and Pehl, Michael: Interleaved Challenge Loop PUF: A Highly Side-Channel Protected Oscillator-Based PUF. IEEE Transactions on Circuits and Systems I: Regular Papers 69 (12), 2022, 5121-5134 more…BibTeX
Tebelmann, Lars and Wettermann, Moritz and Pehl, Michael: On-Chip Side-Channel Analysis of the Loop PUF. Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware Security ASHES, Association for Computing Machinery, 2022Los Angeles, USmore…BibTeX
2021
Anik, Md Toufiq Hasan and Danger, Jean-Luc and Diankha, Omar and Ebrahimabadi, Mohammad and Frisch, Christoph and Guilley, Sylvain and Karimi, Naghmeh and Pehl, M. and Takarabt, Sofiane: Testing and Reliability Enhancement of Security Primitives. DFT 2021 34th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021Athens, Greecemore…BibTeX
Danger, Jean-Luc and Guilley, Sylvain and Pehl, Michael and Senni, Sophiane and Souissi, Youssef: Highly Reliable PUFs for Embedded Systems, Protected Against Tampering. Industrial Networks and Intelligent Systems, Springer International Publishing, 2021Hanoi, Vietnammore…BibTeX
Strieder, Emanuele and Frisch, Christoph and Pehl, Michael: Machine Learning of Physical Unclonable Functions using Helper Data: Revealing a Pitfall in the Fuzzy Commitment Scheme. IACR Transactions on Cryptographic Hardware andEmbedded Systems 2021 (2), 2021, 1–36 more…BibTeX
Tebelmann, Lars and Kühne, Ulrich and Danger, Jean-Luc and Pehl, Michael: Analysis and Protection of the Two-Metric Helper Data Scheme. Constructive Side-Channel Analysis and Secure Design COSADE, Springer International Publishing, 2021Lugano, Switzerlandmore…BibTeX
2020
Frisch, C. and Tempelmeier, M. and Pehl, M.: PAG-IoT: A PUF and AEAD Enabled Trusted Hardware Gateway for IoT Devices. 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2020Limassol, CYPRUSmore…BibTeX
Moghadas, Seyed Hamidreza and Pehl, Michael: ROPAD: A Fully Digital Highly Predictive Ring Oscillator Probing Attempt Detector. 2020 57th ACM/EDAC/IEEE Design Automation Conference (DAC), 2020San Francisco, USAmore…BibTeX
Pehl, Michael and Tretschok, Tobias and Becker, Daniel and Immler, Vincent: Spatial Context Tree Weighting for Physical Unclonable Functions. 2020 European Conference on Circuit Theory and Design ECCTD, 2020Sofia, Bulgariamore…BibTeX
Tebelmann, Lars; Danger, Jean-Luc; Pehl, Michael: Self-secured PUF: Protecting the Loop PUF by Masking. Constructive Side-Channel Analysis and Secure Design, Springer International Publishing, 2020 more…BibTeX
Unterstein, Florian; Sel, Tolga; Zeschg, Thomas; Jacob, Nisha; Tempelmeier, Michael; Pehl, Michael; De Santis, Fabrizio: Secure Update of FPGA-based Secure Elements using Partial Reconfiguration. TRUDEVICE 2020: Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, 2020Grenoble, Francemore…BibTeX
2019
Florian Wilde and Christoph Frisch and Michael Pehl: Efficient Bound for Conditional Min-Entropy of Physical Unclonable Functions Beyond IID. International Workshop on Information Forensics and Security 2019 (WIFS), 2019Delft, Netherlands, 1-6 more…BibTeX
Pehl, Michael; Frisch, Christoph; Feist, Peter Christian; Sigl, Georg: KeLiPUF: a key-distribution protocol for lightweight devices using Physical Unclonable Functions. In: 17th escar Europe : embedded security in cars (Konferenzveröffentlichung). 17th escar Europe : embedded security in cars (Konferenzveröffentlichung), 2019 more…BibTeX
Sepúlveda, Johanna and Wilgerodt, Felix and Pehl, Michael: Towards memory integrity and authenticity of multi-processors system-on-chip using physical unclonable functions. it - Information Technology 61 (1), 2019, 29--43 more…BibTeX
Tebelmann, Lars and Pehl, Michael and Immler, Vincent: Side-Channel Analysis of the TERO PUF. Constructive Side-Channel Analysis and Secure Design COSADE , Springer International Publishing, 2019Darmstadt, Germanymore…BibTeX
Wilde, Florian and Pehl, Michael: On the Confidence in Bit-Alias Measurement of Physical Unclonable Functions. 17th IEEE International New Circuits and Systems Conference (NEWCAS), 2019Münchenmore…BibTeX
2018
Andreas Herrmann, Michael Weiner, Michael Pehl, Helmut Graeb: Bringing Analog Design Tools to Security: Modeling and Optimization of a Low Area Probing Detector. 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2018Prague, Czech Republic more…BibTeX
Sepulveda, Johanna and Willgerodt, Felix and Pehl, Michael: SEPUFSoC: Using PUFs for Memory Integrity and Authentication in Multi-Processors System-on-Chip. ACM Great Lakes Symposium on VLSI, { GLSVLSI} 2018, 2018Chicago, USA more…BibTeX
Sigl, Georg and Gross, Mathieu and Pehl, Michael: Where Technology Meets Security: Key Storage and Data Separation for System-on-Chips. ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC), 2018Dresdenmore…BibTeX
Wilde, Florian and Gammel, Berndt M. and Pehl, Michael: Spatial Correlation Analysis on Physical Unclonable Functions. IEEE Transactions on Information Forensics and Security 13 (6), 2018, 1468-1480 more…BibTeX
2017
Nisha Jacob and Jakob Wittmann and Johann Heyszl and Robert Hesselbarth and Florian Wilde and Michael Pehl and Georg Sigl and Kai Fisher: Securing FPGA SoC Configurations Independent of Their Manufacturers. 30th IEEE International System-on-Chip Conference SOCC, 2017Munich, Germanymore…BibTeX
Pehl, Michael and Hiller, Matthias and Sigl, Georg: Secret Key Generation for Physical Unclonable Functions – Secret Key Generation and Authentication. In: Rafael F. Schaefer and Holger Boche and Ashish Khisti and H. Vincent Poor (Ed.): Information Theoretic Security and Privacy of Information Systems. Cambridge University Press, 2017, 362-389 more…BibTeX
Tebelmann, Lars and Pehl, Michael and Sigl, Georg: EM Side-Channel Analysis of BCH-based Error Correction for PUF-based Key Generation. Proceedings of the 2017 Workshop on Attacks and Solutions in Hardware Security (ASHES '17), ACM, 2017New York, NY, USAmore…BibTeX
Tebelmann, Lars and Pehl, Michael and Sigl, Georg: EM Attack on BCH-based Error Correction for PUFs. Cryptotag, 2017Nürnberg, Germanymore…BibTeX
2016
Arumí, D. and Manich, S. and Rodríguez-Montañés, R.and Pehl, M.: RRAM based random bit generation for hardware security applications. 2016 Conference on Design of Circuits and Integrated Systems (DCIS), 2016Granada, Spainmore…BibTeX
Hiller, Matthias and Pehl, Michael and Kramer, Gerhard and Sigl, Georg: Algebraic Security Analysis of Key Generation with Physical Unclonable Functions. PROOFS 2016: Security Proofs for Embedded Systems , 2016Santa Barbara, CA, USAmore…BibTeX
Wilde, Florian and Gammel, Berndt and Pehl, Michael: Spatial Correlations in Physical Unclonable Functions. Final Conference on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE 2016), 2016Barcelona, Spainmore…BibTeX
2015
Hiller, Matthias and Pehl, Michael and Sigl, Georg: Fehlerkorrekturverfahren zur sicheren Schlüsselerzeugung mit Physical Unclonable Functions. Datenschutz und Datensicherheit - DuD (Volume 39, Issue 4, ), 2015, pp 229-233 more…BibTeX
Hiller, Matthias and Yu, Meng-Day (Mandel) and Pehl, Michael: Systematic Low Leakage Coding for Physical Unclonable Functions. ACM Symposium on Information, Computer and Communications Security (ASIACCS), 2015Singaporemore…BibTeX
Pehl, Michael and Hiller, Matthias and Graeb, Helmut: Efficient Evaluation of Physical Unclonable Functions Using Entropy Measures. Journal of Circuits, Systems and Computers (Vol. 25, No. 1 (2016) 1640001 ), 2015, 23 pages more…BibTeX
Pehl, Michael and Wilde, Florian and Gammel, Berndt and Sigl, Georg: Qualitätsevaluierung von Physical Unclonable Functions als Schlüsselspeicher. 14. Deutscher IT-Sicherheitskongress, 2015Bonn, Deutschlandmore…BibTeX
2014
Pehl, Michael Pehl and Seuschek, Hermann: Herausforderungen der ganzheitlichen Absicherung eingebetteter Systeme. Datenschutz und Datensicherheit - DuD, 2014, Volume 38, Issue 11 , pp 757-761 more…BibTeX
Pehl, Michael, Punnakkal, Akshara Ranjit, Hiller, Matthias and Graeb, Helmut: Advanced Performance Metrics for Physical Unclonable Functions. International Symposium on Integrated Circuits (ISIC), 2014Singaporemore…BibTeX
Wilde, Florian and Hiller, Matthias and Pehl, Michael: Statistic-based Security Analysis of Ring Oscillator PUFs. International Symposium on Integrated Circuits (ISIC), 2014Singaporemore…BibTeX
2013
Hiller, Matthias and Sigl, Georg and Pehl, Michael: A New Model for Estimating Bit Error Probabilities of Ring-Oscillator PUFs. ReCoSoC 2013, 2013Darmstadt, Deutschlandmore…BibTeX
2012
Pehl, Michael; Graeb, Helmut: Tolerance Design of Analog Circuits Using a Branch-and-Bound Based Approach. Journal of Circuits, Systems, and Computers, 2012 more…BibTeX
2011
Pehl, Michael; Graeb, Helmut: An SQP and Branch-and-Bound Based Approach for Discrete Sizing of Analog Circuits – 13. In: Tlelo-Cuautle, Esteban (Ed.): Advances in Analog Circuits. InTech, 2011, 297-316 more…BibTeX
Pehl, Michael; Zwerger, Michael; Graeb, Helmut: Variability-Aware Automated Sizing of Analog Circuits Considering Discrete Design Parameters. International Symposium on Integrated Circuits (ISIC), 2011 more…BibTeX
2010
Pehl, Michael; Graeb, Helmut: Dimensionierung Analoger Schaltungen mit diskreten Parametern unter Verwendung eines Zufalls- und Gradientenbasierten Ansatzes. ITG/GMM-Fachtagung Entwurf von analogen Schaltungen mit CAE-Methoden (ANALOG), 2010 more…BibTeX
Pehl, Michael; Zwerger, Michael; Graeb, Helmut: Sizing Analog Circuits Using an SQP and Branch and Bound Based Approach. IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2010 more…BibTeX
2009
Pehl, Michael; Graeb, Helmut: RaGAzi: A Random and Gradient-Based Approach to Analog Sizing for Mixed Discrete and Continuous Parameters. International Symposium on Integrated Circuits (ISIC), 2009 more…BibTeX
