- Performance and Communication Cost of Hardware Accelerators for Hashing in Post-Quantum Cryptography. ACM Trans. Embed. Comput. Syst., 2024 more… BibTeX Full text ( DOI )
- The Impact of Hash Primitives and Communication Overhead for Hardware-Accelerated SPHINCS+. Constructive Side-Channel Analysis and Secure Design. COSADE 2024, Springer, Cham, 2024 more… BibTeX Full text ( DOI )
- Post-Quantum Signatures on RISC-V with Hardware Acceleration. ACM Trans. Embed. Comput. Syst., 2023 more… BibTeX Full text ( DOI )
- Silicon Proven Hardware Acceleration of Post-Quantum Cryptography on RISC-V. RISC-V Summit Europe 2023, RISC-V Europe, 2023 more… BibTeX
- FuLeeca: A Lee-Based Signature Scheme. Code-Based Cryptography, Springer Nature Switzerland, 2023CBCrypto 2023: 4th International Workshop on Code-Based Cryptography more… BibTeX Full text ( DOI )
- Enabling Lattice-Based Post-Quantum Cryptography on the OpenTitan Platform. Workshop on Attacks and Solutions in Hardware Security Ashes 2023, Association for Computing Machinery, 2023Copenhagen, Denmark, 51–60 more… BibTeX Full text ( DOI )
- Multiplierless Design of Very Large Constant Multiplications in Cryptography. Transactions on Circuits and Systems II: Express Briefs, 2022 more… BibTeX Full text ( DOI )
- Hardware Accelerated FrodoKEM on RISC-V. 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), IEEE, 2022Prague, Czech Republic more… BibTeX Full text ( DOI )
- DOMREP – An Orthogonal Countermeasure for Arbitrary Order Side-Channel and Fault Attack Protection. IEEE Transactions on Information Forensics and Security (16), 2021, 4321-4335 more… BibTeX Full text ( DOI )
- Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems 2022 (1), 2021, 414-460 more… BibTeX Full text ( DOI )
- Algebraic Fault Analysis of Subterranean 2.0. 2021 Workshop on Fault Detection and Tolerance in Cryptography (FDTC), 2021Milano, Italy more… BibTeX Full text ( DOI )
- A Survey on the Application of Fault Analysis on Lightweight Cryptography. 2021 11th IFIP International Conference on New Technologies, Mobility and Security (NTMS), IEEE, 2021Paris, France more… BibTeX Full text ( DOI )
- A Detailed Report on the Overhead of Hardware APIs for Lightweight Cryptography. Cryptology ePrint Archive, Report 2020/112, 2020 more… BibTeX
M.Sc. Patrick Karl
- Tel.: +49 (89) 289 - 28257
- Raum: 0101.Z1.009
- patrick.karl@tum.de
Research Interests
My research focuses on efficient hardware implementations for post-quantum cryptography. More specifically, I am interested in hardware acceleration for digital signature algorithms on RISC-V platforms for embedded systems. This includes not only performance optimizations, but also aims to improve power and energy consumption. Another important aspect is securing implementations against physical attacks, i.e. side-channel and fault-attacks. Besides FPGA prototyping I am also involved in ASIC design and tape-out. Additional interests include advanced cryptographic approaches like homomorphic- or attribute-based encryption. In short:
- Post-Quantum Cryptography
- Efficient Hardware Implementations
- Countermeasures against Physical Attacks
- FPGA and ASIC design
I also contributed to the two NIST submissions CROSS and FuLeeca
Teaching
- Lab Course ASIC Design of Hardware Accelerators for RISC-V: WS22/23, SS23, WS23/24, SS24, WS24/25
- Lab Course Crypto Implementation: SS22
- Circuit Design Fundamentals: 2020/21, 2021/22, 2022/23, 2023/24 (TUM ASIA Singapore)
Publications
Talks
- Guest presentation - Cryptographic Engineering Research Group (CERG GMU), April 2024 (Fairfax VA, USA)
"Post-Quantum Cryptography and HW-/SW- Codesign" - PhD Seminar - Chair of Security in Information Technology (TUM), Jan 2024 (Munich),
"The Post-Quantum Signature Scheme CROSS - An Introduction to Engineers" - PQC-Update 2023, 2023 (Garching):
"Post-Quantum Signatures on RISC-V with Hardware Acceleration" - TASER workshop, 2022 (Leuven):
"A 22nm ASIC for Flexible Post-Quantum Cryptography" - SAFEST Summer School, 2022 (Montpellier):
"RISC-V: Security with and in an open-source Instruction Set" -
NIST Lightweight Cryptography Workshop, 2020 (virtual):
"A Detailed Report on the Overhead of Hardware APIs for Lightweight Cryptography"