Theses and Internships

With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.

Possible topics in this area inlcude:

• New Side-Channel Attacks on PQC
• Innovative implementation approaches in Hardware
• Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
• Innovative Countermeasures against SCA

Prerequisites

Cryptographic implementations in high-level languages like C often suffer from compiler induced side-channel issue which allow e.g. to extract a secret key via the timing behaviour of the implementation. Implemeting in assembly is on the other hand error prone and laboursome. This topic is therefore about implementing and/or verifying certain aspects of a Post-Quantum Cryptographic algorithm in Jasmin [1]. Jasmin allows for exact control of the underlying hardware while providing more abstraction and support than pure assembly. It furthermore allows for formal proofs of the implemented algorithm.

[1]: https://github.com/jasmin-lang/jasmin

Prerequisites

I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.

Possible implementation tasks are the
  - Extension/implementation of symmetric ciphers
  - Extension/implementation of message authentication codes
  - Extension/implementation of error correction codes/functionality

The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.

If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.

With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.

Possible topics in this area inlcude:

• New Side-Channel Attacks on PQC
• Innovative implementation approaches in Hardware
• Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
• Innovative Countermeasures against SCA

Prerequisites

Cryptographic implementations in high-level languages like C often suffer from compiler induced side-channel issue which allow e.g. to extract a secret key via the timing behaviour of the implementation. Implemeting in assembly is on the other hand error prone and laboursome. This topic is therefore about implementing and/or verifying certain aspects of a Post-Quantum Cryptographic algorithm in Jasmin [1]. Jasmin allows for exact control of the underlying hardware while providing more abstraction and support than pure assembly. It furthermore allows for formal proofs of the implemented algorithm.

[1]: https://github.com/jasmin-lang/jasmin

Prerequisites

I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.

Possible implementation tasks are the
  - Extension/implementation of symmetric ciphers
  - Extension/implementation of message authentication codes
  - Extension/implementation of error correction codes/functionality

The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.

If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.

With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.

Possible topics in this area inlcude:

• New Side-Channel Attacks on PQC
• Innovative implementation approaches in Hardware
• Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
• Innovative Countermeasures against SCA

Prerequisites

Cryptographic implementations in high-level languages like C often suffer from compiler induced side-channel issue which allow e.g. to extract a secret key via the timing behaviour of the implementation. Implemeting in assembly is on the other hand error prone and laboursome. This topic is therefore about implementing and/or verifying certain aspects of a Post-Quantum Cryptographic algorithm in Jasmin [1]. Jasmin allows for exact control of the underlying hardware while providing more abstraction and support than pure assembly. It furthermore allows for formal proofs of the implemented algorithm.

[1]: https://github.com/jasmin-lang/jasmin

Prerequisites

With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.

Possible topics in this area inlcude:

• New Side-Channel Attacks on PQC
• Innovative implementation approaches in Hardware
• Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
• Innovative Countermeasures against SCA

Prerequisites

Cryptographic implementations in high-level languages like C often suffer from compiler induced side-channel issue which allow e.g. to extract a secret key via the timing behaviour of the implementation. Implemeting in assembly is on the other hand error prone and laboursome. This topic is therefore about implementing and/or verifying certain aspects of a Post-Quantum Cryptographic algorithm in Jasmin [1]. Jasmin allows for exact control of the underlying hardware while providing more abstraction and support than pure assembly. It furthermore allows for formal proofs of the implemented algorithm.

[1]: https://github.com/jasmin-lang/jasmin

Prerequisites

I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.

Possible implementation tasks are the
  - Extension/implementation of symmetric ciphers
  - Extension/implementation of message authentication codes
  - Extension/implementation of error correction codes/functionality

The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.

If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.

The course "Advanced Cryptographic Implementation" covers advanced techniques for implementing cutting-edge cryptographic algorithms including post-quantum cryptography. Students will learn how to implement advanced countermeasures to protect cryptographic implementations from side-channel and fault attacks. 

During the course, students will work on a hands-on project where they will implement, evaluate, and optimize cryptographic algorithms.

As a tutor, you will provide technical support to students during the summer semester through, e.g., virtual meetings or remote supervision via chat or email.

Timeline and working hours:

From 01.05.2025 until 31.07.2025 with a total of 84 hours. Flexible working hours and flexible working period are possible.

Prerequisites

·         Knowledge of cryptography and embedded systems

·         Hands-on experience with C/ASM/Python programming

·         Self-motivated and independent working style

·         Previous attendance to the course is desirable, but not required

Task Description:

Side-channel analysis is an established research field which exploits unintended signal emanations of hardware that processes secret information. An attacker may be able to gain access to processed secrets by observing the electromagnetic (EM) field of a microcontroller that executes a cryptographic algorithm. In this work you will perform side-channel leakage analysis on an FPGA target in one of our state of the art hardware security laboratories. You will assist in all steps from experiment design, firmware development, measurements and finally data analysis.

Within this work, you will:

• implement FPGA firmware for the experiments

 • evaluate side-channel leakage behavior.

• perform measurements of the EM side channel in our state-of-the art hardware security lab.

•evaluate the measurements

• write code to integrate the FPGA target into our automated measurement framework.

Prerequisites

With the transition to Post-Quantum Cryptography and the number of new algorithms proposed, there is an increasing need to evaluate the physical security of these algorithms as well as their implementability in Hardware as well as in Software.

Possible topics in this area inlcude:

• New Side-Channel Attacks on PQC
• Innovative implementation approaches in Hardware
• Acceleration of a PQC algorithm in Software using either optimized assembly or hardware accelerators
• Innovative Countermeasures against SCA

Prerequisites

The smart card lab is a laboratory tailored for master students who want to expand their theoretical knowledge in side-channel analysis. Using the lessons learned in SIKA (Secure Implementation of Cryptographic Algorithms), students explore first-hand how to perform a correlation power analysis and break cryptographic implementations themselves. Howevel, the lab, is not only limited to just breaking implementations, but also covers a variety of approaches to secure implementations.

Given the broad scope of this lab, I am looking for a tutor (6-8 hours per week) to support my students, while working together with me to develop new ideas and refine existing exercises.

To give you a glimpse into potential tasks, on the hardware side you can

• assemble new smart cards, logic analyzers and debug adapter PCBs
• repair existing hardware if a malfunction can be seen
• drive the development of a new hardware revision

But you are not limited to the hardware aspects, we also strive to

• improve the existing smart card firmware to make it even more secure
• experiment with new ways to make the exercises more exciting. For example to give the students the opportunity to compete in a CTF-like scenario
• create a solution to automatically test and evaluate the code submitted by the students

If you are interested in embedded systems and hardware-software co-design, this could be the student job for you. I do not have the prerequesite of you having taken the course already.

Prerequisites

I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.

Possible implementation tasks are the
  - Extension/implementation of symmetric ciphers
  - Extension/implementation of message authentication codes
  - Extension/implementation of error correction codes/functionality

The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.

If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.