Theses and Internships

I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.

Possible implementation tasks are the
  - Extension/implementation of symmetric ciphers
  - Extension/implementation of message authentication codes
  - Extension/implementation of error correction codes/functionality

The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.

If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.

Tätigkeitsbeschreibung
Die ARM TrustZone bietet eine bew¨ahrte Ausf ¨uhrungsumgebung (Trusted Execution Environment,
TEE), um sicherheitskritische Anwendungen getrennt vom prim¨aren Betriebssystem
(OS) in eine kontrollierte Umgebung auszulagern. In diesem Zusammenhang
findet die Ausf ¨uhrung komplexer Programme in der Regel in der “normalen Welt” statt,
w¨ahrend minimale und hochgradig vertrauensw¨urdige Programme in der “sicheren Welt”
isoliert werden. In einer Vielzahl von Ver¨ offentlichungen wurde bereits nachgewiesen,
dass diese Trennung zur U¨ berwachung der normalen Welt genutzt werden kann. Typische
Ansa¨ tze implementieren eine Art von U¨ berwachung, indem das prima¨ re Betriebssystem
w¨ahrend der Laufzeit aus der sicheren Welt heraus analysiert wird. Ein weitl ¨aufiges Problem
dabei ist, dass diese Ans¨ atze durch die Ressourcen der sicheren Welt begrenzt sind
und k¨onnen w¨ahrend der Laufzeit keine Beweise f ¨ ur Folgeuntersuchungen liefern.
Ein neuartiger Ansatz best¨unde darin, die Privilegien der sicheren Welt in der ARM
TrustZone zu nutzen, um die normale Welt effektiv einzufrieren und einen forensischen
Schnappschuss des potenziell kompromittierten Systems zu erstellen. Dies erfordert
einen Mechanismus, um die normale Welt von der weiteren Ausf ¨uhrung von Programmen
abzuhalten, und zus¨ atzlich die Entwicklung eines Mechanismus zur sicheren Speicherung
oder U¨ bertragung des forensischen Schnappschusses des Arbeitsspeichers.
Die Aufgaben f ¨ ur die Abschlussarbeit umfassen:
• Analyse von verwandten Arbeiten zur Anfertigung von Speicherabbildungen innerhalb
der sicheren Welt.
• Erarbeitung eines Konzeptes zur sicheren U¨ bertragung bzw. Ablage des Schnappschusses
ohne die Verwendung von Ressourcen aus der normalen Welt.
• Bedrohungsmodellierung des entworfenen Designs anhand verschiedener Angriffspfade.
• Implementierung einer Trusted Application (TA) f ¨ ur OP-Tee zum Anhalten der normalen
Welt und Anfertigung von Schnappsch¨ussen des Arbeitsspeichers.
Anforderungen
• Hohe Motivation sowie selbstst ¨andige und zielorientierte Arbeitsweise
• Gute Programmierkenntnisse in C/C++ oder Grundlagen in Rust
• Praxiserfahrung im Umgang mit Linux-basierten Betriebssystemen
• Grundkenntnisse zu Trusted Execution Environments wie OP-TEE
Der Prototyp soll f ¨ ur die ARM Fixed Virtual Platforms (FVPs) entwickelt werden, sodass
keine direkte Hardware-Abh¨angigkeit besteht und auch remote bearbeitet werden kann.

I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.

Possible implementation tasks are the
  - Extension/implementation of symmetric ciphers
  - Extension/implementation of message authentication codes
  - Extension/implementation of error correction codes/functionality

The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.

If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.

For a practical usage, we want the responses of Physical Unclonable Functions (PUFs) to be unpredictable for an attacker, but reproducible for a legitimate user—intuitive criteria which need to be specified in the form of statistical tests to be useful for a practical evaluation. Practical tests range from simple ones, e.g. calculating the bias of the responses (bit 1 should be as likely as a 0 overall), to more complex tests like estimating spatial correlations between response bits. Each checks for a different aspect, pointing towards particular classes of possible issues.

The aim of this work is to consolidate existing tooling for the assessment of PUFs from measurement data into a newly built framework. The targeted end result is a common test suite which is

• generic regarding the concrete dataset, its data format, its dimensions, and the applicable tests,
• extensible, i.e. includes the currently existing tests but can be easily adapted to cover additional ones, and
• maintainable and auditable to allow for confidence in the correctness of the results.

Prerequisites

For a practical usage, we want the responses of Physical Unclonable Functions (PUFs) to be unpredictable for an attacker, but reproducible for a legitimate user—intuitive criteria which need to be specified in the form of statistical tests to be useful for a practical evaluation. Practical tests range from simple ones, e.g. calculating the bias of the responses (bit 1 should be as likely as a 0 overall), to more complex tests like estimating spatial correlations between response bits. Each checks for a different aspect, pointing towards particular classes of possible issues.

The aim of this work is to consolidate existing tooling for the assessment of PUFs from measurement data into a newly built framework. The targeted end result is a common test suite which is

• generic regarding the concrete dataset, its data format, its dimensions, and the applicable tests,
• extensible, i.e. includes the currently existing tests but can be easily adapted to cover additional ones, and
• maintainable and auditable to allow for confidence in the correctness of the results.

Prerequisites

In principle, an artificial neural network (ANN) can be trained to closely approximate any function. Progress in the domain of machine learning (ML) has shown that this universal approximation of functions has not only theoretical, but also practical relevance.

Error correction codes (ECCs) map information to a larger space, adding redunandancy so that the original information can be recovered despite erroneous data transmission. To decode a received data word and correct transmission errors, typically bespoke classical algorithms are used.

In principle, an ANN could be used in place of a classical decoding algorithm and prior research has shown that this specific application is indeed possible. The goal of this work is to look into this idea in more detail by

• doing a literature search on ML-based ECC decoders,
• assessing the feasibility of adapting the structure of an ANN to different ECCs, and possibly
• conducting practical experiments by training and evaluating such a decoder.

Prerequisites

BIKE (Bit Flipping Key Encapsulation) is a post-quantum key exchange scheme based on quasi-cyclic moderate-density parity-check (QC-MDPC) codes. Security relies on the hardness of decoding random linear codes, where an attacker only knows the public matrix H, the syndrome s, and the exact weight of the error vector.

In this project the student will generate large datasets of BIKE ciphertexts and corresponding error vectors, and design experiments to analyze whether the weight (or distribution) of the error vector can be predicted directly from the syndrome and the parity-check matrix.

This includes:

• Implementing dataset generation with fixed public keys and varying error vectors

• Designing statistical or machine-learning based approaches to estimate error weights

• Evaluating how predictable the error structure is and whether such predictability could weaken BIKE’s assumed hardness

Prerequisites

I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.

Possible implementation tasks are the
  - Extension/implementation of symmetric ciphers
  - Extension/implementation of message authentication codes
  - Extension/implementation of error correction codes/functionality

The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.

If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.

For a practical usage, we want the responses of Physical Unclonable Functions (PUFs) to be unpredictable for an attacker, but reproducible for a legitimate user—intuitive criteria which need to be specified in the form of statistical tests to be useful for a practical evaluation. Practical tests range from simple ones, e.g. calculating the bias of the responses (bit 1 should be as likely as a 0 overall), to more complex tests like estimating spatial correlations between response bits. Each checks for a different aspect, pointing towards particular classes of possible issues.

The aim of this work is to consolidate existing tooling for the assessment of PUFs from measurement data into a newly built framework. The targeted end result is a common test suite which is

• generic regarding the concrete dataset, its data format, its dimensions, and the applicable tests,
• extensible, i.e. includes the currently existing tests but can be easily adapted to cover additional ones, and
• maintainable and auditable to allow for confidence in the correctness of the results.

Prerequisites

Es gibt einen Praktikumsteil zur Vorlesung, in dem verschiedene
Aspekte der IT-Sicherheit mithilfe eines eigenen Linux-Systems
und verschiedener Server-VMs praktisch geübt werden.

Deine Hauptaufgabe als Tutor*in sollte es sein, die
Studierenden während der Tutorstunden (2× wöchtentlich
à 1½ h) vor Ort bei der Bearbeitung dieser Aufgaben zu
unterstützen.

Daneben kannst du an der Wartung und Weiterentwicklung
der Aufgaben mitwirken und diese kreativ mitgestalten. Es gibt
stets Verbesserungspotential, was Verlässlichkeit und Inhalte
angeht!

Du solltest solide Linux-Kenntnisse mitbringen, da du häufig
Studierende, die vor der Vorlesung noch keinen Kontakt mit
Linux hatten, bei der Fehlersuche unterstützen wirst. Ein Besuch
der Vorlesung ist von Vorteil, aber keine zwingende
Voraussetzung.

Die Anstellung beläuft sich auf 6 h/Woche während der Vorlesungszeit im Wintersemester.

Task Description:

Side-channel analysis is an established research field which exploits unintended signal emanations of hardware that processes secret information. An attacker may be able to gain access to processed secrets by observing the electromagnetic (EM) field of a microcontroller that executes a cryptographic algorithm. In this work you will perform side-channel leakage analysis on an FPGA target in one of our state of the art hardware security laboratories. You will assist in all steps from experiment design, firmware development, measurements and finally data analysis.

Within this work, you will:

• implement FPGA firmware for the experiments

 • evaluate side-channel leakage behavior.

• perform measurements of the EM side channel in our state-of-the art hardware security lab.

•evaluate the measurements

• write code to integrate the FPGA target into our automated measurement framework.

Prerequisites

I am looking for students who are interested in HW implementations and have knowledge of an HDL language. You would be a suitable candidate if you are also interested in cryptography and its applications.

Possible implementation tasks are the
  - Extension/implementation of symmetric ciphers
  - Extension/implementation of message authentication codes
  - Extension/implementation of error correction codes/functionality

The implementation will be analyzed for its suitability for memory encryption and integrity verification of memory contents. This assessment will measure and evaluate typical performance metrics on an FPGA.

If any topics interest you, please email me to discuss the details and your interests. Your application will benefit if you attach your current grade report and CV.