- VRank: Enhancing Verilog Code Generation from Large Language Models via Self-Consistency. 2025 26th International Symposium on Quality Electronic Design (ISQED), IEEE, 2025, 1-7 mehr… BibTeX Volltext ( DOI )
- Large Language Models (LLMs) for Verification, Testing, and Design. IEEE European Test Symposium (ETS), 2025 mehr… BibTeX
- CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design. Design, Automation and Test in Europe (DATE), 2025 mehr… BibTeX Volltext ( DOI ) Volltext (mediaTUM) WWW
- LLM-Aided Efficient Hardware Design Automation. , 2024 mehr… BibTeX Volltext ( DOI )
- OplixNet: Towards Area-Efficient Optical Split-Complex Networks with Real-to-Complex Data Assignment and Knowledge Distillation. Design, Automation and Test in Europe (DATE), 2024 mehr… BibTeX
- AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design. ACM/IEEE International Symposium on Machine Learning for CAD (MLCAD), ACM, 2024, 1-10 mehr… BibTeX Volltext ( DOI )
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