Zhidan Zheng, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann
XRing: A Crosstalk-Aware Synthesis Method for Wavelength-Routed Optical Ring Routers
In: Design, Automation and Test in Europe (DATE)
April 2023
(Paper)
Alexandre Truppel, Tsun-Ming Tseng, Ulf Schlichtmann
Accurate Infinite-order Crosstalk Calculation for Optical Networks-on-Chip
IEEE/OSA Journal of Lightwave Technology (JLT) 41(1), 4 - 16
January 2023
(Paper)
Moyuan Xiao, Tsun-Ming Tseng, Ulf Schlichtmann
Crosstalk-Aware Automatic Topology Customization and Optimization for Wavelength-Routed Optical NoCs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 41(12), 5261 - 5274
December 2022
(Paper)
Tsun-Ming Tseng, Mengchu Li, Zhidan Zheng, Alexandre Truppel, Ulf Schlichtmann
Efficiency-Oriented Design Automation Methods for Wavelength-Routed Optical Network-on-Chip
In: Silicon Photonics for High-Performance Computing and Beyond
CRC Press, November 2021
Zhidan Zheng, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann
ToPro: A Topology Projector and Waveguide Router for Wavelength-Routed Optical Networks-on-Chip
In: IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
November 2021
(Paper)
Moyuan Xiao, Tsun-Ming Tseng, Ulf Schlichtmann
FAST: A Fast Automatic Sweeping Topology Customization Method for Application-Specific Wavelength-Routed Optical NoCs
In: Design, Automation and Test in Europe (DATE)
February 2021
(Paper)
Zhidan Zheng, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann
Light: A Scalable and Efficient Wavelength-Routed Optical Networks-On-Chip Topology
In: IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC)
January 2021
(Paper)
Alexandre Truppel, Tsun-Ming Tseng, Davide Bertozzi, José Carlos Alves, Ulf Schlichtmann
PSION+: Combining logical topology and physical layout optimization for Wavelength-Routed ONoCs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 39(12), 5197 - 5210
December 2020
(Paper)
Alexandre Truppel, Tsun-Ming Tseng, Ulf Schlichtmann
PSION 2: Optimizing Physical Layout of Wavelength-Routed ONoCs for Laser Power Reduction
In: IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
November 2020
(Paper)
Mengchu Li, Tsun-Ming Tseng, Mahdi Tala, Ulf Schlichtmann
Maximizing the Communication Parallelism for Wavelength-Routed Optical Networks-on-Chips
In: IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC)
January 2020
(Paper)
Tsun-Ming Tseng, Alexandre Truppel, Mengchu Li, Mahdi Nikdast, Ulf Schlichtmann
Wavelength-Routed Optical NoCs: Design and EDA — State of the Art and Future Directions
In: IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
November 2019
(Invited Paper)
(Paper)
Alexandre Truppel, Tsun-Ming Tseng, Davide Bertozzi, José Carlos Alves, Ulf Schlichtmann
PSION: Combining logical topology and physical layout optimization for Wavelength-Routed ONoCs
In: ACM/SIGDA International Symposium on Physical Design (ISPD)
April 2019
(Paper)
Mengchu Li, Tsun-Ming Tseng, Davide Bertozzi, Mahdi Tala, Ulf Schlichtmann
CustomTopo: A Topology Generation Method for Application-Specific Wavelength-Routed Optical NoCs
In: IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
November 2018
(Paper)
Yu-Kai Chuang, Kuan-Jung Chen, Kun-Lin Lin, Shao-Yun Fang, Bing Li, Ulf Schlichtmann
PlanarONoC: Concurrent Placement and Routing Considering Crossing Minimization for Optical Networks-on-Chip
In: ACM/IEEE Design Automation Conference (DAC)
June 2018
Fengxian Jiao, Sheqin Dong, Bei Yu, Bing Li, Ulf Schlichtmann
Thermal-Aware Placement and Routing for 3D Optical Networks-on-Chips
In: IEEE International Symposium on Circuits and Systems (ISCAS)
May 2018
Anja von Beuningen, Ulf Schlichtmann
PLATON: A Force-Directed Placement Algorithm for 3D Optical Networks-on-Chip
In: ACM/SIGDA International Symposium on Physical Design (ISPD)
April 2016
Anja von Beuningen, Luca Ramini, Davide Bertozzi, Ulf Schlichtmann
PROTON+: A Placement and Routing Tool for 3D Optical Networks-on-Chip with a Single Optical Layer
ACM Journal on Emerging Technologies in Computing Systems (JETC) 12(4), 44:1--44:28
December 2015
Anja Boos, Luca Ramini, Ulf Schlichtmann, Davide Bertozzi
PROTON: An Automatic Place-and-Route Tool for Optical Networks-on-Chip
In: IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
November 2013
Optical Networks-on-Chip (ONoC)
CLASSICAL WRONoC SYNTHESIS: FROM TOPOLOGY GENERATION TO PHYSICAL DESIGN
Over the past decade, our researchers have developed a series of design automation tools for wavelength-routed optical networks-on-chip (WRONoCs): from topology generation to physical design. In our tools, we model the design automation problems as linear and quadratic optimization problems and apply corresponding optimization methods and algorithms.
Specifically, our topology generation tool CustomTopo synthesizes customized application-specific WRONoC topologies with a focus on minimizing network redundancy; and our physical design tools including PROTON, PROTON+, PLATON and PlanarONoC focus on insertion loss minimization by reducing waveguide crossings and waveguide lengths.
PSION: Combining logical topology and physical layout optimization of Wavelength-Routed Optical Networks-on-Chip
The design of WRONoCs is an optimization process that seeks to minimize electrical & optical power usage (among other metrics) while maximizing network performance (e.g. throughput of the optical channels). Traditionally, this process is done in two steps: first the logical topology of the network is created according to network requirements (eg. communication matrix), then the elements in the topology are placed & routed (P&R) according to the physical constraints of the integrated circuit. Unfortunately, this may lead to suboptimal designs because the dependency between logical topology and physical layout is inherently bi-directional, i.e. logical topology constraints dictate P&R results, but P&R constraints also influence the best logical topology.
The PSION family of tools seeks to perform optimization of both steps at once for the optimization functions relevant in WRONoC design, going from the underlying WRONoC design requirements directly to a finished WRONoC design.
Light: A Scalable and Efficient Wavelength-Routed Optical Networks-On-Chip Topology
WRONoCs are known for delivering collision- and arbitration-free on-chip communication in many-cores systems. While appealing for low latency and high predictability, WRONoCs are challenged by scalability concerns caused by high microring resonator (MRR) usage and the mismatch with realistic physical constraints.
To address these problems, we have proposed an N x (N - 1) WRONoC topology: Light with a 4 x 3 router Hash as the basic building block, and a simple but efficient approach to configure the resonant wavelength for each MRR. Compared with state-of-the-art topologies, Light reduces the MRR usage by more than a half and avoids additional waveguide crossings or detours during physical implementation. Experimental results show that Light outperforms state-of-the-art topologies in terms of enhancing signal-to-noise ratio (SNR) and reducing insertion loss, especially for large-scale networks. Furthermore, Light has great potential in application-specific WRONoCs. Thus, our further target is to adapt Light to support different kinds of applications with low insertion loss and high signal quality.