Foto von Alexander Hepp

Alexander Hepp

Technische Universität München

Dienstort

Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)

Work:
Theresienstr. 90(0101)/1.ZG
80333 München

Forschungsgebiete

  • Hardware trojan design/identification
  • Netlist reverse engineering
  • Neuro engineering

Lehre

Wintersemester 2021/22

Sommersemester 2022

TitelLV-Nr.Vortragende/r (Mitwirkende/r)
Blockpraktikum C++0000004715
Blockpraktikum C++0000002124
Strategic Management for Engineers0000003412

Offene Arbeiten für Studenten

Bachelorarbeiten

Bringing a RISC-V to Life: Implementation of tooling for a RISC-V CPU

Beschreibung

RISC-V is the upcoming instruction set architecture of the future. We have taped out our own RISC-V chip for security purposes.

Your task is to implement various testing routines for a RISC-V CPU existing at the chair.

Voraussetzungen

This list is not final, rather a guideline for the competences required for successfully completing the project.

  • Sufficient knowledge of C
  • Experience with embedded programming and environment
  • Some knowledge of cmake, as compilation works via cmake
  • Some knowledge of python, as tooling is partially implemented with it.

Betreuer:

Alexander Hepp

Ingenieurpraxis

Bringing a RISC-V to Life: Implementation of tooling for a RISC-V CPU

Beschreibung

RISC-V is the upcoming instruction set architecture of the future. We have taped out our own RISC-V chip for security purposes.

Your task is to implement various testing routines for a RISC-V CPU existing at the chair.

Voraussetzungen

This list is not final, rather a guideline for the competences required for successfully completing the project.

  • Sufficient knowledge of C
  • Experience with embedded programming and environment
  • Some knowledge of cmake, as compilation works via cmake
  • Some knowledge of python, as tooling is partially implemented with it.

Betreuer:

Alexander Hepp

Aktuelle Veröffentlichungen

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Hinweis: Die „Schnellsuche“ findet nur Text in den angezeigten Feldern; nicht in Abstracts oder Schlagwörtern. Der Suchbegriff muss mindestens 3 Buchstaben lang sein.

2022

  • Aksoy, Levent and Hepp, Alexander and Baehr, Johanna and Pagliarini, Samuel: Hardware Obfuscation of Digital FIR Filters. 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, IEEE, 2022Prague, Czech Republic mehr… BibTeX
  • Hepp, Alexander and Baehr, Johanna and Sigl, Georg: Golden Model-Free Hardware Trojan Detection by Classification of Netlist Module Graphs. Design, Automation and Test in Europe Conference, IEEE, 2022Antwerp, Belgium mehr… BibTeX
  • Lippmann, Bernhard and Ludwig, Matthias and Mutter, Johannes and Bette, Ann-Christin and Hepp, Alexander and Baehr, Johanna and Rasche, Martin and Kellermann, Oliver and Gieser, Horst and Zweifel, Tobias and Kovac, Nicola: Physical and Functional Reverse Engineering Challenges for Advanced Semiconductor Solutions. 2022 Design, Automation & Test in Europe Conference & Exhibition DATE, IEEE, 2022Antwerp, Belgium mehr… BibTeX

2021

  • Hepp, Alexander and Sigl, Georg: Tapeout of a RISC-V Crypto Chip with Hardware Trojans: A Case-Study on Trojan Design and Pre-Silicon Detectability. Proceedings of the 18th ACM International Conference on Computing Frontiers (CF '21), Association for Computing Machinery, 2021Virtual: Catania, Italy mehr… BibTeX Volltext ( DOI )
  • Ludwig, Matthias and Hepp, Alexander and Brunner, Michaela and Baehr, Johanna: CRESS: Framework for Vulnerability Assessment of Attack Scenarios in Hardware Reverse Engineering. 2021 IEEE Physical Assurance and Inspection of Electronics (PAINE), 2021Washington DC, US mehr… BibTeX Volltext ( DOI )

Kostenlose Volltexte für ausgewählte Veröffentlichungen

Sie können hier die Volltexte meiner Publikationen kostenlos herunterladen
10.1145/3457388.3458869 Tapeout of a RISC-V crypto chip with hardware trojans
10.1109/PAINE54418.2021.9707695 CRESS: Framework for Vulnerability Assessment of Attack Scenarios in Hardware Reverse Engineering
10.1145/3513086 Towards a Human-readable State Machine Extraction
DDECS 2022 (wird veröffentlicht) Hardware Obfuscation of Digital FIR Filters (Best Paper Award)