Foto von Thomas Schamberger

M.Sc. Thomas Schamberger

Technische Universität München

Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)

Dienstort

Lehrstuhl für Sicherheit in der Informationstechnik (Prof. Sigl)

Work:
Theresienstr. 90(0101)/1.ZG
80333 München

Raum: N1010ZG

PGP: B9EF 779D 3413 B470 1780 F078 827D 493A 6742 4BD9

Forschungsinteressen

  • Seitenkanalattacken (Power Analysis & EM) auf Post-Quanten-Kryptographie
  • Effiziente und sichere Implementierungen von Post-Quanten-Kryptographie Algorithmen
  • Maßnahmen zur Absicherung gegen Seitenkanalattacken

Studentische Arbeiten

Bei Interesse an einem meiner Forschungsgebiete können Sie mich gerne kontaktieren. In einem persönlichen Gespräch finden wir passende Bachelor-/Masterarbeiten sowie ein Thema für die Forschungspraxis.

Offene Arbeiten

Dimensionality Reduction Methods for Side-Channel Attacks - A Survey

Beschreibung

Even though a cryptographic algorithm is proven to be mathematical secure for the best known attack, its implementation can lead to a so called side-channel. An example for such a channel is the power consumption or the EM emissions of the executing device. With side-channel analysis (SCA) the additional information of a power side-channel can be exploited to extract the secret key and therefore break the cryptosystem.

On challenge during the practical execution of SCA attacks consists in handling the huge amount of measurement data that is often needed in order to execute a successful attack. In order to reduce data complexity and therefore the amount of data that has to be processed for an attack, different dimensionality reduction methods can be used. A prominent example for such a method is the Principal Component Analysis (PCA) and Linear Discriminant Analysis (LDA).

This work should provide a survey of different dimensionality reduction methods in the context of SCA. A focus should lie on PCA and LDA but an extensive literature review should be performed. As a starting point the reference [1] can be used. Advantages and disadvantages as well as the field of application of each method should be discussed.

[1] Cagli et al.: “Enhancing Dimensionality Reduction Methods for Side-Channel Attacks”, International Conference on Smart Card Research and Advanced Applications (CARDIS), 2015

Kontakt

Betreuer:

Thomas Schamberger

Veröffentlichungen / Publications

2022

  • Egger, Maximilian and Schamberger, Thomas and Tebelmann, Lars and Lippert, Florian and Sigl, Georg: A Second Look at the ASCAD Databases. Constructive Side-Channel Analysis and Secure Design, Springer International Publishing, 2022 mehr… BibTeX
  • Horlemann, Anna-Lena and Puchinger, Sven and Renner, Julian and Schamberger, Thomas and Wachter-Zeh, Antonia: Information-Set Decoding with Hints. Code-Based Cryptography, Springer International Publishing, 2022Leuven, Belgium mehr… BibTeX
  • Schamberger, Thomas and Holzbaur, Lukas and Renner, Julian and Wachter-Zeh, Antonia and Sigl, Georg: A Power Side-Channel Attack on the Reed-Muller Reed-Solomon Version of the HQC Cryptosystem. Post-Quantum Cryptography, Springer International Publishing, 2022 mehr… BibTeX

2021

  • Fritzmann, Tim and Van Beirendonck, Michiel and Basu Roy, Debapriya and Karl, Patrick and Schamberger, Thomas and Verbauwhede, Ingrid and Sigl, Georg: Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems 2022 (1), 2021, 414-460 mehr… BibTeX
  • Gruber, Michael and Probst, Matthias and Karl, Patrick and Schamberger, Thomas and Tebelmann, Lars and Tempelmeier, Michael and Sigl, Georg: DOMREP – An Orthogonal Countermeasure for Arbitrary Order Side-Channel and Fault Attack Protection. IEEE Transactions on Information Forensics and Security (16), 2021, 4321-4335 mehr… BibTeX
  • Hamburg, Mike and Hermelink, Julius and Primas, Robert and Samardjiska, Simona and Schamberger, Thomas and Streit, Silvan and Strieder, Emanuele and van Vredendaal, Christine: Chosen Ciphertext k-Trace Attacks on Masked CCA2 Secure Kyber. IACR Transactions on Cryptographic Hardware and Embedded Systems 2021 (4), 2021, 88–113 mehr… BibTeX
  • Horlemann, Anna-Lena and Puchinger, Sven and Renner, Julian and Schamberger, Thomas and Wachter-Zeh, Antonia: Information-Set Decoding with Hints. Code-Based Cryptography CBCrypto 2021, Springer International Publishing, 2021 mehr… BibTeX
  • Kulow, Alexander and Schamberger, Thomas and Tebelmann, Lars and Sigl, Georg: Finding the Needle in the Haystack: Metrics for Best Trace Selection in Unsupervised Side-Channel Attacks on Blinded RSA. IEEE Transactions on Information Forensics and Security 16, 2021, 3254-3268 mehr… BibTeX

2020

  • Schamberger, Thomas; Renner, Julian; Sigl, Georg; Wachter-Zeh, Antonia: A Power Side-Channel Attack on the CCA2-Secure HQC KEM. Smart Card Research and Advanced Applications, Springer International Publishing, 2020 mehr… BibTeX
  • Unterstein, Florian; Schink, Marc; Schamberger, Thomas; Tebelmann, Lars; Ilg, Manuel; Heyszl, Johann: Retrofitting Leakage Resilient Authenticated Encryption to Microcontrollers. IACR Transactions on Cryptographic Hardware and Embedded Systems 2020 (4), 2020, 365-388 mehr… BibTeX

2019

  • Fritzmann, Tim and Schamberger, Thomas and Frisch, Christoph and Braun, Konstantin and Maringer, Georg and Sepúlveda, Johanna: Efficient Hardware/Software Co-design for NTRU. VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, Springer International Publishing, 2019 mehr… BibTeX
  • Schamberger, Thomas and Mischke, Oliver and Sepulveda, Johanna: Practical Evaluation of Masking for NTRUEncrypt on ARM Cortex-M4. Constructive Side-Channel Analysis and Secure Design, Springer International Publishing, 2019Constructive Side-Channel Analysis and Secure Design 2019 (COSADE) mehr… BibTeX

2018

  • Braun, Konstantin and Fritzmann, Tim and Maringer, Georg and Schamberger, Thomas and Sepulveda, Johanna: Secure and Compact Full NTRU Hardware Implementation. 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018 Verona, Italy mehr… BibTeX