Seminar on Topics in Electronic Design Automation

Lecturer (assistant)
Number0000003270
TypeSeminar
Duration3 SWS
TermWintersemester 2022/23
Language of instructionEnglish
Position within curriculaSee TUMonline

Dates

Admission information

See TUMonline
Note: Students have to choose a seminar topic BEFORE the introduction lesson. To do so, students directly contact the supervisor of the topic they are interested in. Topics are assigned on a first-come-first-served basis. The supervisor needs to confirm that a topic has been assigned to the student. First after the confirmation the students is considered to be registered for the seminar. For a list of topics refer to the following link: https://www.ei.tum.de/eda/lehrveranstaltungen/seminare/seminar-on-topics-in-electronic-design-automation/

Objectives

At the end of the seminar, the students are able to present a new idea or an existing approach in the area of computer-aided circuit and system design in an understandable and convincing manner. For this purpose, the following competencies will be acquired: * The students are able to independently familiarize themselves with a scientific topic in the field of electronic design automation * The students are able to present their topic in a structured way according to problem formulation, state of the art, goals, methods and results. * The students can present their topic, according to the above mentinoned structure, orally in form of a presentation, visually as a poster and with a set of slides, and in form of a writen report.

Description

Specific seminar topics in the area of electronic design automation will be offered. Examples are analog design methodology, digital design methodology, layout synthesis, and system-level design methodology. The students work independently on a scientific topic and write a paper of 4 pages. At the end of the seminar, the students present their topic during a scientific talk. In a subsequent discussion the topic will be treated in-depth.

Prerequisites

No specific previous knowledge required.

Teaching and learning methods

Learning method: Students elaborate a given scientific topic by themselves and are advised by a research assistant. Teaching method: Introductory lessons will be given, which cover advice on the work procedure during the seminar, scientific writing techniques as well as the preparation of an oral presentation. The students discuss further (specific) details with the advising research assistants on an individual basis. Media: All current techniques for preparing and presenting papers and talks will be applied, e.g. - blackboard, whiteboard - electronic slides, beamer - electronic word processing - electronic slide processing

Examination

The examination is based on a scientific elaboration. This examination consist of a written part (50%) in form of a paper (4 pages), and of an oral part (50%) in form a presentation of approximatly 30 minutes (including a subsequent discussion). Through the scientific elaboration students show that they can prepare, structure and present, e.g., the state-of-the-art, a new idea or an existing approach in the area of electronic design automation.

Recommended literature

A set of topics and related literature is given at the start of the course. Each participant selects his/her topic.

Links

Topics - online

Please find the topics for the WT 22/23 below.

The topics are handed out on a first-come-first served basis. Contact the supervisor of the topic to get more information and reserve a topic. Please make sure, that you get a confirmation of your supervisor onlce you selected a topic. We are looking forward to see you in the seminar.

Seminars

Performance Comparison of Derivative Free Optimization Algorithms

Description

 

One of the most common approaches in optimization is to make use of first and second derivatives, in order to find a minimum of a target function. In many cases though, this is not a viable option, as derivatives might not be available, or the function might not be differentiable at all.
For such problems, we need algorithms, that work without derivatives. This can be achieved for example using finite differences or interpolation.
One important algorithm family are the algorithms NEWUOA and BOBYQA by M. J. D. Powell.
The goal of this seminar is to gather works, that evaluate the performance of those algorithms. Furthermore, we want to create a performance matrix that puts Powell’s algorithms into relation with traditional algorithms over a range of different optimization problems.

 

Paper for BOBYQA (Has not to be read enirely!):
www.damtp.cam.ac.uk/user/na/NA_papers/NA2009_06.pdf

 

 

 

Prerequisites

Knowledge in optimization and basic linear algebra is recommended.

Contact

markus.leibl@tum.de

Supervisor:

Markus Leibl

Multi-network deployment for embedded machine learning: Scheduling multiple networks as part of the deployment

Description

Exploring the scheduling methods used when deploying multiple
inference graphs/tasks onto a single, ideally heterogeneous, platform

Contact

alex.hoffman@tum.de

Supervisor:

Alexander Hoffman

Multi-network deployment for embedded machine learning: Heuristic design space optimisation methods

Description

Looking into currently used heuristic methods for finding
mappings from network inference tasks to hardware

Contact

alex.hoffman@tum.de

Supervisor:

Alexander Hoffman

GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors

Keywords:
VP, ISS, ESL, CAS, RISC-V

Description

Modern design approaches for embedded systems rely heavily on abstract models of the targeted hardware, to allow early and fast simulations of the system. Typical examples of such models are Virtual Prototypes (VPs) and Instruction Set Simulators (ISSs).

While VPs and ISSs offer high simulation speeds, they are not capable of providing reliable information regarding the systems performance (i.e. its timing behavior). Cycle Accurate Simulators (CAS) are capable of providing more accurate data on the systems performance, but at the cost of reduced simulation speeds.

GVSoC is a highly flexible full-platform simulator that offers high simulation speeds compared to other CASs, and has a typical error rate of below 10%.

 

Contact

conrad.foik@tum.de

Supervisor:

Conrad Foik

ComCAS: A Compiled Cycle Accurate Simulation for Hardware Architecture

Keywords:
VP, ISS, ESL, CAS

Description

Modern design approaches for embedded systems rely heavily on abstract models of the targeted hardware, to allow early and fast simulations of the system. Typical examples of such models are Virtual Prototypes (VPs) and Instruction Set Simulators (ISSs).

While VPs and ISSs offer high simulation speeds, they are not capable of providing reliable information regarding the systems performance (i.e. its timing behavior). Cycle Accurate Simulators (CAS) are capable of providing more accurate data on the systems performance, but at the cost of reduced simulation speeds.

The ComCAS simulator explores the use of "compiled simulation" to increase the simulation speed of a CAS.

Contact

conrad.foik@tum.de

Supervisor:

Conrad Foik

Survey: Open-Source Electronic Design Automation

Description

Electronic Design Automation (EDA) has enabled rapid speedup in the development of new electronic systems and devices. By means of hierarchical design paradigms, logic synthesis or floorplanning algorithms and timing analysis, etc. the time to market for new designs can be reduced, while the system complexity increases. However, most intellectual property in this domain is protected by major vendors. But recently, the attention on open-source projects in EDA has grown. For example, with OpenRoad [1], a RTL-to-GDSII design flow is under developement to make ASIC digital design process more accessible.

 

The goal of this topic should be a survey on current work in open-source tools for EDA. Major projects should be identified and its benefits and limitations should be investigated.

 

[1] KAHNG, Andrew B.; SPYROU, Tom. The OpenROAD project: Unleashing hardware innovation. In: Proc. GOMAC. 2021.

Contact

If you are interested in this topic, please contact me at philipp.fengler@tum.de

Supervisor:

Philipp Fengler

A polynomial time optimal diode insertion/routing algorithm for fixing antenna problem

Description

Abstract— Antenna problem is a phenomenon of plasma induced gate oxide degradation. It directly affects manufacturability of VLSI circuits, especially in deep-submicron technology using high density plasma. Diode insertion is a very effective way to solve this problem Ideally diodes are inserted directly under the wires that violate antenna rules. But in today's high-density VLSI layouts, there is simply not enough room for "under-the-wire" diode insertion for all wires. Thus it is necessary to insert many diodes at legal "off-wire" locations and extend the antenna-rule violating wires to connect to their respective diodes. Previously only simple heuristic algorithms were available for this diode insertion and routing problem. In this paper we show that the diode insertion and routing problem for an arbitrary given number of routing layers can be optimally solved in polynomial time. Our algorithm guarantees to find a feasible diode insertion and routing solution whenever one exists. Moreover we can guarantee to find a feasible solution to minimize a cost function of the form /spl alpha/ /spl middot/ L + /spl beta/ /spl middot/ N where L is the total length of extension wires and N is the total number of Was on the extension wires. Experimental results show that our algorithm is very efficient.

Contact

alex.truppel@tum.de

Supervisor:

Alexandre Truppel

A general multi-layer area router

Description

Abstract— This paper presents a general multi-layer area router based on a novel grid construction scheme. The grid construction scheme produces more wiring tracks than the normal uniform grid scheme and accounts for differing design rules of the layers involved. Initial routing performed on the varying capacity grid is followed by a layer assignment stage. Routing completion is ensured by iterating local and global modifications in the layer assignment stage. Our router has been incorporated into the Custom Cell Synthesis project at MCC and has shown improved results for cell synthesis problems when compared with the router Mighty which was used in earlier versions of the project.

Contact

alex.truppel@tum.de

Supervisor:

Alexandre Truppel