- A Concise, Architecture-Focused ASIP Modeling Approach for Instruction Set Simulators. Methods and Description Languages for Modelling and Verification of Circuits and Systems (MBMV), 2024 more… BibTeX
- Effective Processor Model Generation from Instruction Set Simulator to Hardware Design. 2023 IEEE Nordic Circuits and Systems Conference (NorCAS), IEEE, 2023 more… BibTeX Full text ( DOI )
- vRTLmod: An LLVM Based Open-Source Tool to Enable Fault Injection in Verilator RTL Simulations. Proceedings of the 20th ACM International Conference on Computing Frontiers (CF '23), Association for Computing Machinery, 2023 more… BibTeX
- Key-Recovery Fault Injection Attack on the Classic McEliece KEM. Code-Based Cryptography, Springer Nature Switzerland, 2023 more… BibTeX
- Fused Depthwise Tiling for Memory Optimization in TinyML Deep Neural Network Inference. tinyML Research Symposium, 2023 more… BibTeX
- CompaSeC: A Compiler-Assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V. Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASPDAC ), Association for Computing Machinery, 2023 more… BibTeX
- MonTM: Monitoring-based Thermal Management for Mixed-Criticality Systems. 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2023) ( Open Access Series in Informatics (OASIcs) ), Schloss Dagstuhl -- Leibniz-Zentrum für Informatik , 2023 more… BibTeX Full text ( DOI )
- A Flexible Simulation Environment for RISC-V. RISC-V Summit Europe, 2023 more… BibTeXWWW
- Application-aware aging analysis and mitigation for SRAM Design-for-Reliability. Microelectronics Reliability 134, 2022 more… BibTeX
- An FPGA-based Approach to Evaluate Thermal and Resource Management Strategies of Many-Core Processors. ACM Transactions on Architecture and Code Optimization 19 (3), 2022 more… BibTeX
- Generation of Distributed Monitors and Run-Time Verification of Invasive Applications – 8. In: Invasive Computing. FAU University Press, 2022, 229 -- 253 more… BibTeX
- The Scale4Edge RISC-V Ecosystem. Design, Automation and Test in Europe (DATE), 2022 more… BibTeX
- CorePerfDSL: A Flexible Processor Description Language for Software Performance Simulation. Forum on Specification and Design Languages (FDL), 2022 more… BibTeX
- Memory Utilization-Based Dynamic Bandwidth Regulation for Temporal Isolation in Multi-Cores. 2022 IEEE 28th Real-Time and Embedded Technology and Applications Symposium (RTAS), 2022 more… BibTeX
- COMPAS: Compiler-assisted Software-implemented Hardware Fault Tolerance for RISC-V. Mediterranean Conference on Embedded Computing (MECO), 2022 more… BibTeX
- A Distributed Hardware Monitoring System for Runtime Verification on Multi-tile MPSoCs. ACM Transactions on Architecture and Code Optimization 18 (1), 2021, 1 -- 25 more… BibTeX
- RAP Model—Enabling Cross-Layer Analysis and Optimization for System-on-Chip Resilience. In: Dependable Embedded Systems. Springer, 2021, 1 -- 27 more… BibTeX
- Cross-Layer Resilience Against Soft Errors: Key Insights. In: Dependable Embedded Systems. Springer, 2021, 249 -- 275 more… BibTeX
- REPAIR: Control Flow Protection based on Register Pairing Updates for SW-Implemented HW Fault Tolerance. ACM Transactions on Embedded Computing Systems (TECS) 20 (70), 2021, 1-22 more… BibTeX
- Tiny Generative Image Compression for Bandwidth-Constrained Sensor Applications. IEEE International Conference on Machine Learning and Applications, 2021 more… BibTeX
- Exploring the RISC-V Vector Extension for the Classic McEliece Post-Quantum Cryptosystem. 2021 22nd International Symposium on Quality Electronic Design (ISQED), IEEE, 2021 more… BibTeX
- Learning based Memory Interference Prediction for Co-running Applications on Multi-Cores. MLCAD '21 - Proceedings of the 2021 ACM/IEEE Workshop on Machine Learning for CAD, 2021 more… BibTeX
- Runtime Monitoring of Inter- and Intra-Thread Requirements on Embedded MPSoCs. 2020 33rd International Conference on VLSI Design and 2020 19th International Conference on Embedded Systems (VLSID), 2020 more… BibTeX Full text ( DOI )
- Machine Learning Approaches for Efficient Design Space Exploration of Application-specific NoCs. ACM Transactions on Design Automation of Electronic Systems (TODAES) 25 (5), 2020 more… BibTeX Full text ( DOI )
- A Distributed Hardware Monitoring System for Runtime Verification on Multi-tile MPSoCs. Accepted for Publication in ACM Transactions on Architecture and Code Optimization, 2020 more… BibTeX Full text ( DOI )
- ML Training on a Tiny Microcontroller for a Self-adaptive Neural Network-based DC Motor Speed Controller. ITEM Workshop: IoT, Edge, and Mobile for Embedded Machine Learning, 2020 more… BibTeX
- Investigating the Inherent Soft Error Resilience of Embedded Applications by Full-System Simulation. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2020 more… BibTeX
- Driver Generation for IoT Nodes with Optimization of the Hardware/Software Interface. Embedded Systems Letters (ESL), 2019 more… BibTeX Full text ( DOI )
- Analysis of Dissipative Losses in Modular Reconfigurable Energy Storage Systems Using SystemC TLM and SystemC-AMS. ACM Transactions on Design Automation of Electronic Systems (TODAES), 2019 more… BibTeX Full text ( DOI )
- Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V. Design, Automation and Test in Europe (DATE), 2019 more… BibTeX
- SeRoHAL: Generation of Selectively Robust Hardware Abstraction Layers for Efficient Protection of Mixed-criticality Systems. Asia and South Pacific Design Automation Conference (ASP-DAC), 2019 more… BibTeX
- SRAM Design Exploration with Integrated Application-Aware Aging Analysis. Design, Automation and Test in Europe (DATE), 2019 more… BibTeX
- MAGIC: A Wear-leveling Circuitry to Mitigate Aging Effects in Sense Amplifiers of SRAMs. 2019 IEEE 17th International New Circuits and Systems Conference (NEWCAS), 2019 more… BibTeX
- Neural Network-based Vehicle Image Classification for IoT Devices. International Workshop on Signal Processing Systems (SiPS), 2019 more… BibTeX
- Instruction Extension of a RISC-V Processor Modeled with IP-XACT. IEEE Nordic Circuits and Systems Conference (NorCAS), 2019 more… BibTeX
- ACCESS: HW/SW Co-Equivalence Checking for Firmware Optimization. ACM/IEEE Design Automation Conference (DAC), 2019 more… BibTeX
- Fully Distributed Deep Learning Inference on Resource-Constrained Edge Devices. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2019 more… BibTeX
- Graph-Grammar-Based IP-Integration (GRIP) - An EDA Tool for Software-Defined SoCs. ACM Transactions on Design Automation of Electronic Systems (TODAES) 23 (3), 2018, 40:1--40:26 more… BibTeX Full text ( DOI )
- Design and Validation of Fault-tolerant Embedded Controllers. Design, Automation and Test in Europe (DATE), 2018 more… BibTeX
- Wavefront-MCTS: Multi-objective Design Space Exploration of NoC Architectures based on Monte Carlo Tree Search. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018 more… BibTeX
- Emulation of an ASIC Power, Temperature and Aging Monitor System for FPGA Prototyping. IEEE International On-Line Testing Symposium (IOLTS), 2018 more… BibTeX
- {ETISS-ML}: A Multi-Level Instruction Set Simulator with {RTL}-level Fault Injection Support for the Evaluation of Cross-Layer Resiliency Techniques. Design, Automation and Test in Europe (DATE), 2018 more… BibTeX
- Efficient Fault Injection for Embedded Systems: As Fast as Possible but as Accurate as Necessary. IEEE International On-Line Testing Symposium (IOLTS), 2018 more… BibTeX
- Performance and Accuracy in Soft-Error Resilience Evaluation using the Multi-Level Processor Simulator ETISS-ML. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018 more… BibTeX
- Automated Redirection of Hardware Accesses for Host-Compiled Software Simulation. Forum on Specification and Design Languages (FDL), 2018 more… BibTeX
- Host-Compiled Simulation. In: Handbook of Hardware/Software Codesign. Springer Netherlands, 2017, 1--27 more… BibTeX
- A Model-based Framework For Networks-on-Chip Design Space Exploration. 2nd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS), 2017 more… BibTeX Full text ( DOI )
- Fault Injection for Test-Driven Development of Robust SoC Firmware (PDF). ACM Transactions on Embedded Computing Systems (TECS) 17, 2017 more… BibTeX Full text ( DOI )
- The Extendable Translating Instruction Set Simulator (ETISS) interlinked with an MDA Framework for fast RISC Prototyping. IEEE International Symposium on Rapid System Prototyping (RSP), 2017 more… BibTeX
- GRIP: Graph-Rewriting-Based IP-Integration - An EDA Tool for Software Defined SoC Design. Design, Automation and Test in Europe (DATE) University Booth, 2016 more… BibTeX
- Hardware-Accelerated Software Libraries Drivers Generation for IP-Centric SoC Designs. Great Lakes Symposium on VLSI (GLS-VLSI), 2016 more… BibTeX
- Fault Injection at Host-Compiled Level with Static Fault Set Reduction for SoC Firmware Robustness Testing. International conference on Hardware/Software codesign and system synthesis (CODES+ISSS), 2016 more… BibTeX
- Embedded Software Reliability Testing by Unit-Level Fault Injection. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2016 more… BibTeX
- Safety Evaluation based on Virtual Prototypes: Fault Injection with Multi-level Processor Models. International Symposium on Integrated Circuits (ISIC), 2016 more… BibTeX
- Fehlerinjektion auf Unit-Ebene zur Robustheitsverifikation eingebetteter Software. edaWorkshop, 2016 more… BibTeX
- The Next Generation of Virtual Prototyping: Ultra-fast Yet Accurate Simulation of HW/SW Systems. Design, Automation and Test in Europe (DATE), 2015 more… BibTeX
- C++ Processor Models for Accelerated Multi-level Error Effect Simulation. edaWorkshop, 2015 more… BibTeX
- GRIP: Grammar-Based IP Integration and Packaging for Acceleration-Rich SoC Designs. ACM/IEEE Design Automation Conference (DAC), 2015 more… BibTeX
- Automation of FPGA Performance Monitoring and Debugging Using IP-XACT and Graph-Grammars. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2015 more… BibTeX
- VHDL Code Generation from IP-Xact using the Eclipse Modeling Framework (EMF). Design and Verification Conference and Exhibition (DVCon) Tutorials, 2015 more… BibTeX
- Fault-tolerant Embedded Control Systems for Unreliable Hardware. International Symposium on Integrated Circuits (ISIC), 2014 more… BibTeX
- SystemC-based Multi-level Error Injection for the Evaluation of Fault-tolerant Systems. International Symposium on Integrated Circuits (ISIC), 2014 more… BibTeX
- A TSV-Property-aware Synthesis Method for Application-Specific 3D-NoCs Design. Design Automation and Test in Europe (DATE), Friday Workshop on 3D Integration, 2014 more… BibTeX
- Resilience Articulation Point (RAP): Cross-layer Dependability Modeling for Nanometer System-on-chip Resilience. Microelectronics Reliability 54 (6-7), 2014, 1066-1074 more… BibTeX
- Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference (DAC '14), ACM, 2014 more… BibTeX
- Deterministic Synthesis of Hybrid Application-Specific Network-on-Chip Topologies. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on 33 (10), 2014, 1503-1516 more… BibTeX
- Technology-Aware System Failure Analysis in the Presence of Soft Errors by Mixture Importance Sampling. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013 more… BibTeX
- Memory Access Reconstruction Based on Memory Allocation Mechanism for Source-Level Simulation of Embedded Software. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), 2013 more… BibTeX
- Fast Cache Simulation for Host-Compiled Simulation of Embedded Software. Design, Automation and Test in Europe (DATE), 2013 more… BibTeX
- Analytical Timing Estimation for Temporally Decoupled TLMs Considering Resource Conflicts. Design, Automation and Test in Europe (DATE), 2013 more… BibTeX
- A Virtual Prototyping Platform for Real-time Systems with a Case Study for a Two-wheeled Robot. Design, Automation and Test in Europe (DATE), 2013 more… BibTeX
- A Spectral Clustering Approach to Application-Specific Network-on-Chip Synthesis. Design, Automation and Test in Europe (DATE), 2013 more… BibTeX
- Application of Dempster-Shafer Theory to Task Mapping under Epistemic Uncertainty. 2013 IEEE International Systems Conference, 2013 more… BibTeX
- A Greedy Approach for Latency-bounded Deadlock-free Routing Path Allocation for Application-specific NoCs. International Symposium on Networks-on-Chip (NOCS), 2013 more… BibTeX
- A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. IEEE Micro 33 (4), 2013 more… BibTeX
- Accurately Timed Transaction Level Models for Virtual Prototyping at High Abstraction Level. Design, Automation and Test in Europe (DATE), 2012 more… BibTeX
- Hierarchical Control Flow Matching for Source-level Simulation of Embedded Software. IEEE International Symposium on System-on-Chip, 2012 more… BibTeX
- Automated Construction of a Cycle-Approximate Transaction Level Model of a Memory Controller. Design, Automation and Test in Europe (DATE), 2012 more… BibTeX
- An Approach toward Accurately Timed TLM+ for Embedded System Models. edaWorkshop, 2011 more… BibTeX
- Removal of Unnecessary Context Switches from the SystemC Simulation Kernel for Fast VP Simulation. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2011 more… BibTeX
- Control-flow-driven Source Level Timing Annotation for Embedded Software Models on Transaction Level. EUROMICRO Conference on Digital System Design (DSD), 2011 more… BibTeX
- Aging model for timing analysis at register-transfer-level. ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2010 more… BibTeX
- Computation of Yield-optimized Pareto Fronts for Analog Integrated Circuit Specifications. Design, Automation and Test in Europe (DATE), 2010 more… BibTeX
- Berechnung von ausbeuteoptimierten Spezifikationsparetofronten für analoge integrierte Schaltungen. ITG/GMM-Fachtagung Entwurf von analogen Schaltungen mit CAE-Methoden (ANALOG), 2010 more… BibTeX
- Workshop Entwurf zukünftiger Systeme mit unzuverlässigen Komponenten. newsletter edacentrum, 2009, 21 more… BibTeX
- A Successive Approach to Compute the Bounded Pareto Front of Practical Multi-objective Optimization Problems. SIAM Journal on optimization 20 (2), 2009, 915--934 more… BibTeX
- Pareto-Optimierung analoger Schaltungen mit Parametertoleranzen. ITG/GMM-Fachtagung Entwurf von analogen Schaltungen mit CAE-Methoden (ANALOG), 2008, 2008 more… BibTeXWWW
- Trade-off design of analog circuits using goal attainment and "wave front" sequential quadratic programming. Design, Automation & Test in Europe Conference & Exhibition, 2007, DATE '07, 2007Nice, 16-20 April 2007, 6 pages more… BibTeXWWW
Dr.-Ing. Daniel Müller-Gritschneder
Technical University of Munich
Chair of Electronic Design Automation (Prof. Schlichtmann)
Postal address
Postal:
Arcisstr. 21
80333 München
Research
Short Bio
Daniel Mueller-Gritschneder is currently holding the position of Adjunct Teaching Professor (Privatdozent) for Electronic System Level Design Methods at the Institute for Electronic Design Automation (Prof. Schlichtmann). He was the temporary acting head of the Chair of Real Time Systems (www.ei.tum.de/rcs) from Nov. 2019 until March 202. He received his Diploma and doctoral degree in electrical engineering and information technology from TUM in 2003 and 2009 respectively. In 2019 he completed his habilitation at TUM. He is senior member of IEEE. He received the best paper award at SiPS 2019, the Habilitation Award of the Bund der Freunde der technischen Universität Muenchen in 2019, the 2nd best paper award at SMACD'15, and his papers were nominated for best paper at DAC’07, DATE’10, Analog’10 and NOCS’13.
Research
Current research focus is on:
- TinyML (Running Neural Network Inference on Low-power Micro-Controllers)
- Embedded Software Development
- Soft Error Resilience for Safety-Critical Application
- Virtual Prototyping of Embedded Systems and SoCs
- Design Space Exploration Methods for Embedded Systems and SoCs
For an overview of my research please look at our research page
Activities in the research community
I am or have been involved in the following conferences and workshops:
- International Conference on Hardware/Software Codesign and System Synthesis (CODES/ISSS)
- ACM/IEEE Design Automation Conference (DAC)
- International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)
- Workshop „Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen” (MBMV)
- Euromicro Conference on Digital System Design (DSD)
- International Conference on VLSI Design & International Conference on Embedded Design (VLSID)
- Workshop on RISC-V Activities
- International Workshop on Embedded Software for Industrial IoT (ESIIT)
- International Workshop on Resiliency in Embedded Electronic Systems (REES)
- HiPEAC International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISEC)