Design Methods for Integrated Circuits (MSE)
| Lecturer (assistant) | |
|---|---|
| Number | 0000001969 |
| Type | |
| Duration | 3 SWS |
| Term | Sommersemester 2024 |
| Language of instruction | German |
| Position within curricula | See TUMonline |
Admission information
Objectives
Upon successful completion of the module, the students are familiar with fundamental techniques of discrete mathematics and respective algorithms to design, optimize and simulate digital circuits on gate level and to develop test patterns for such circuits. Techniques will be known both for combinational and sequential circuits. Therefore, the students are familiar with techniques which are currently used in industry and allow successful automation of the design of industrial scale circuits. In addition, the students recognize the fundamental importance of automation for increasing the productivity of an engineer and therefore economic success.
Description
Logic Synthesis: binary Boolean functions, optimization of combinational circuits (two-level, multi-level), FSMs, optimization of sequential circuits.
Logic Simulation: event-driven simulation, modelling and simulation using VHDL.
Testing of digital circuits: fault diagnosis; fault covering table; test pattern generation in combinational circuits; test pattern generation in sequential circuits; design for testability.
Prerequisites
Module "Digitale Schaltungen (Digital Circuits)".
Familiarity with discrete mathematics is beneficial, but not required.
Teaching and learning methods
Both in lecture and in tutorial, the lecturer presents the material to the students. Some interactive questions / discussions will be held. In the tutorial, the students will in addition work on problems on their own.
Media
Primarily notes on blackboard and / or tablet PC;
PowerPoint slides (primarily for introduction of new sections).
Lecture materials will be provided to the students.
Possibly online problems will be used to support independent learning by the students.
Examination
The module will be graded based on the final written examination (60 minutes, open book policy: printed material, non-programmable pocket calculator).
Recommended literature
No additional literature besides the materials provided are required for successfully mastering the contents of this module. If a different perspective or additional information is desired, the following books are recommended: * G. De Micheli: Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994 * M. L. Bushnell, V. D. Agrawal: Essentials of Electronic Testing for Digital, Memory, and Mixed Signal VLSI Circuits, Kluwer Academic Publishers, 2000
Links
Bachelorbereich: BSc-EI, MSE, BSEDE
| WS | SS | Diskrete Mathematik für Ingenieure (BSEI, EI00460) Discrete Mathematics for Engineers (BSEDE ) (Schlichtmann) (Januar) |
| WS | SS | Entwurf digitaler Systeme mit VHDL u. System C (BSEI, EI0690) (Ecker) |
| SS | Entwurfsverfahren für integrierte Schaltungen (MSE, EI43811) (Schlichtmann) | |
| WS | Methoden der Unternehmensführung (BSEI, EI0481) (Weigel) | |
| WS | Praktikum System- und Schaltungstechnik (BSEI, EI0664) (Schlichtmann et al.) | |
| SS | Schaltungssimulation (BSEI, EI06691) (Gräb/Schlichtmann) |
Masterbereich: MSc-EI, MSCE, ICD
| SS | Advanced Topics in Communication Electronics (MSCE, MSEI, EI79002) | ||
| WS | Electronic Design Automation (MSCE, MSEI, EI70610) (B. Li, Tseng) | ||
| WS | Design Methodology and Automation (ICD) (Schlichtmann) (Nov) | ||
| WS | SS | Machine Learning: Methods and Tools (MSCE, MSEI, EI71040) (Ecker) | |
| WS | SS SS | Mathematical Methods of Circuit Design (MSCE, MSEI, EI74042) (Gräb) Simulation and Optimization of Analog Circuits (ICD) (Gräb) (Mai) | |
| WS | Mixed Integer Programming and Graph Algorithms in Engineering Problems (MSCE, MSEI, EI71059) (Tseng) | ||
| WS | SS | Numerische Methoden der Elektrotechnik (MSEI, EI70440) (Schlichtmann oder Gräb) | |
| WS WS | SS | Seminar VLSI-Entwurfsverfahren (MSEI, EI7750) (Schlichtmann/Müller-Gritschneder) Seminar on Topics in Electronic Design Automation (MSCE, EI77502) (Schlichtmann/Müller-Gritschneder) | |
| WS | SS | Synthesis of Digital Systems (MSCE, MSEI, EI70640) (Müller-Gritschneder) | |
| WS | Testing Digital Circuits (MSCE, MSEI, EI50141) (Otterstedt) | ||
| WS | Timing of Digital Circuits (MSCE, MSEI, EI70550) (B. Li, Zhang) | ||
| WS | SS | VHDL System Design Laboratory (MSCE, MSEI, EI7403) (Schlichtmann) |
MSE: Munich School of Engineering (TUM)
BSEDE: Bachelor of Science in Electronics and Data Engineering (TUM-Asia)
ICD: Master of Science in Integrated Circuit Design (TUM-Asia)
MSCE: Master of Science in Communications Engineering (TUM)
MSEI: Master of Science in Elektrotechnik und Informationstechnik
BSEI: Bachelor of Science in Elektrotechnik und Informationstechnik
Aktuelle Infos zur Lehre/Current information on teaching: https://www.tum.de/die-tum/aktuelles/coronavirus/studium/, www.ei.tum.de