Research Interests

My research interests are summarized in the following points:

  • Post-Quantum Cryptography / Lattice-based Cryptography
  • Secure and efficient HW/SW implementations
  • Error-Correcting Codes
  • RISC-V Co-Processor Design
  • ASIC-Design

Public-Key Cryptography (PKC) builds the basis for establishing secure communication between multiple parties. However, the fast progress in the development of quantum computers represents a risk for all communication systems because large-scaled quantum computers might be able to break traditional PKC. As a consequence, there is a need to develop new algorithms based on mathematical hard problems that resist even attacks performed on quantum computers. Cryptography resisting quantum attacks is also known as Post-Quantum Cryptography.

The first part of my research is to investigate post-quantum protocols on algorithmic level. The selection of the algorithm's parameter set determines the performance characteristic, e.g. the security level of the protocol, the failure probability, and the amount of exchanged bytes. In particular, the application of strong Error-Correcting-Codes can help to improve these important characteristics.

The second part of my research is to develop secure and efficient HW/SW designs of Post-Quantum Cryptography. Employing Post-Quantum Cryptography in electronic devices is challenging due to tight performance requirements as well as area and power constraints. Moreover, implementations must be secured against implementation attacks. During my research I investigate: 1.) improvement of efficiency using hardware-accelerators; 2.) HW/SW Co-Design on a FPGA-SoC; 3.) HW/SW Co-Design on a RISC-V SoC.



Fritzmann, Tim and Van Beirendonck, Michiel and Roy, Debapriya Basu and Karl, Patrick and Schamberger, Thomas and Verbauwhede, Ingrid and Sigl, Georg: Masked Accelerators and Instruction Set Extensions for Post-Quantum Cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(1), 414-460. (paper)

Fritzmann, Tim and Vith, Jonas Vith and Flórez, Daniel and Sepúlveda, Johanna: Post-Quantum Cryptography for Automotive Systems. Microprocessors and Microsystems, 87(November 2021), 1–8, Nov. 2021. (paper)


Roy, Debapriya Basu and Fritzmann, Tim and Sigl, Georg: Efficient Hardware/Software Co-Design for Post-Quantum Crypto Algorithm SIKE on ARM and RISC-V based Microcontrollers. In Proceedings of the 39th International Conference on Computer-Aided Design (ICCAD), 2020 (pp. 1-9). (paper)

Fritzmann, Tim and Sigl, Georg and Sepúlveda, Johanna: RISQ-V: Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), 239-280. (paper)

Fritzmann, Tim and Sigl, Georg and Sepúlveda, Johanna: Extending the RISC-V Instruction Set for Hardware Acceleration of the Post-Quantum Scheme LAC. Design, Automation & Test in Europe (DATE) 2020, 2020 Grenoble, France (paper)

Maringer, Georg and Fritzmann, Tim and Sepúlveda, Johanna: The Influence of LWE/RLWE Parameters on the Stochastic Dependence of Decryption Failures. 22nd International Conference on Information and Communications Security (ICICS 2020), 2020, Copenhagen, Denmark (paper)

Fritzmann, Tim and Vith, Jonas Vith and Sepúlveda, Johanna: Strengthening Post-Quantum Security for Automotive Systems. Euromicro Conference on Digital System Design (DSD), 2020 Kranj, Slovenia


Fritzmann, Tim and Vith, Jonas and Sepúlveda, Johanna: Post-quantum key exchange mechanism for safety critical systems. In: 17th escar Europe: embedded security in cars. 2019. Stuttgart Germany (paper)

Fritzmann, Tim and Sepúlveda, Johanna: Efficient and Flexible Low-Power NTT for Lattice-Based Cryptography. 2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2019. Washington, D.C., USA (paper)

Fritzmann, Tim and Sharif, Uzair and Müller-Gritschneder, Daniel and Reinbrecht, Cezar and Schlichtmann, Ulf and Sepulveda, Johanna: Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V. Design, Automation & Test in Europe (DATE) 2019, 2019. Florence, Italy (paper)

Fritzmann, Tim and Schamberger, Thomas and Frisch, Christoph and Braun, Konstantin and Maringer, Georg and Sepúlveda, Johanna: Efficient Hardware/Software Co-design for NTRU. VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms, Springer International Publishing, 2019 (paper)


Braun, Konstantin and Fritzmann, Tim and Maringer, Georg and Schamberger, Thomas and Sepulveda, Johanna: Secure and Compact Full NTRU Hardware Implementation. 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018. Verona, Italy (paper)

Fritzmann, Tim and Pöppelmann, Thomas and Sepulveda, Johanna: Analysis of Error-Correcting Codes for Lattice-Based Key Exchange. Conference on Selected Areas in Cryptography (SAC), 2018 Calgary, Canada, 1-22 (paper)