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Concept of hardware description language (Verilog); build an end-to-end communication chain including a UART interface, Huffman source encoding, convolutional channel encoding, and 16-QAM digital modulation; apply hardware description languages to design each module; integrate the modules into a complete system; verify the design through simulation and FPGA implementation.

Fundamentals of digital logic design
Fundamentals of programming

Learning Method:
The course follows a structured, two-phase approach to build both theoretical knowledge and practical skills.

1. Foundational Learning: Students begin by acquiring a solid understanding of Verilog HDL through several theoretical lectures. This knowledge is reinforced with lecture slides and an interactive web platform for hands-on practice.
2. Applied Learning: Following the lectures, students transition to a semester-long laboratory project. They apply their knowledge by working through a series of guided tasks of increasing complexity, as outlined in the provided task manual. This project-based method ensures students learn by doing, culminating in the implementation of a complete digital system.

Teaching Method:
The course is delivered through a blend of direct instruction and supported, independent lab work.

Lectures: The course begins with instructor-led lectures to introduce core concepts.
Laboratory Work: For the practical part of the course, students are provided with an FPGA board, a detailed task manual, and test codes.
Flexible Support: Students have the flexibility to work in a dedicated lab room or on their own PCs. Tutors are available in the lab during scheduled hours each week to provide direct instruction, answer questions, and offer support.