Electrical Engineering Fundamentals I
| Lecturer (assistant) | |
|---|---|
| Number | 0000003281 |
| Type | lecture with integrated exercises |
| Duration | 4 SWS |
| Term | Wintersemester 2025/26 |
| Language of instruction | German |
| Position within curricula | See TUMonline |
- 15.10.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 16.10.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 22.10.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 23.10.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 29.10.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 30.10.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 05.11.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 06.11.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 12.11.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 13.11.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 19.11.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 20.11.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 26.11.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 27.11.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 03.12.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 10.12.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 11.12.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 17.12.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 18.12.2025 08:30-10:00 003, Hörsaal 2, "Interims II"
- 07.01.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
- 08.01.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
- 14.01.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
- 15.01.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
- 21.01.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
- 22.01.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
- 28.01.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
- 29.01.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
- 04.02.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
- 05.02.2026 08:30-10:00 003, Hörsaal 2, "Interims II"
Admission information
Objectives
After attending the course, students will be able to understand basic circuit concepts of digital logic and function blocks, design an optimized finite state machine, and evaluate technical and economic implications of digital circuits. In addition, students acquire a basic understanding of the operation of MOS transistors, CMOS circuits, and microprocessors.
Description
The module provides a basic understanding of the relevance of digital circuits, Moore's Law, and the architecture of microprocessors.
The following topics are covered:
* Arithmetic calculation in the binary system, conversion of number systems, value range, fixed point, floating point,
* Boolean algebra, combinatorial and sequential logic, arithmetic operators, finite automata, data and control path, synchronous circuits, timing analysis, pipelining and parallelization,
* MOSFET transistors, CMOS logic circuits, timing, power dissipation,
* RISC processor architecture, ALU, memory hierarchy, data path pipeline, performance, data dependencies, branch prediction, speculative execution.
The following topics are covered:
* Arithmetic calculation in the binary system, conversion of number systems, value range, fixed point, floating point,
* Boolean algebra, combinatorial and sequential logic, arithmetic operators, finite automata, data and control path, synchronous circuits, timing analysis, pipelining and parallelization,
* MOSFET transistors, CMOS logic circuits, timing, power dissipation,
* RISC processor architecture, ALU, memory hierarchy, data path pipeline, performance, data dependencies, branch prediction, speculative execution.
Prerequisites
High school maths and physics
Teaching and learning methods
The module contains a lecture and weekly central exercise. The lecture will give a theoretical background and introductory examples. These will then be practiced in the central exercises using specific tasks.
In addition to the central exercise, tutorials are offered in several parallel groups. The group size is significantly lower there than in the central exercise. The tutors are older students and thus close to the first semester in order to deepen the content from their perspective.
As a learning method, in addition to the individual methods of the students, an in-depth knowledge formation is aimed for through multiple task computations in exercises and tutorials.
In addition to the central exercise, tutorials are offered in several parallel groups. The group size is significantly lower there than in the central exercise. The tutors are older students and thus close to the first semester in order to deepen the content from their perspective.
As a learning method, in addition to the individual methods of the students, an in-depth knowledge formation is aimed for through multiple task computations in exercises and tutorials.
Examination
The exam is a written test, 75 minutes. By answering comprehension questions and solving computational problems, students demonstrate that they understand how digital circuits work, apply dimensioning rules, and evaluate technical and economic implications.
Recommended literature
- J. Rabaey: "Digital Integrated Circuits", Prentice Hall
- J. Wakerly: "Digital Design Principles and Practices", Prentice Hall
- H. Lipp, J. Becker: "Grundlagen der Digitaltechnik", Oldenbourg Verlag
- J. Wakerly: "Digital Design Principles and Practices", Prentice Hall
- H. Lipp, J. Becker: "Grundlagen der Digitaltechnik", Oldenbourg Verlag
Links
Bachelorbereich: BSc-EI, BSES, BSEDE
| SS | Diskrete Mathematik für Ingenieure (BSEI, EI00460) (Schlichtmann) | |
| WS | Discrete Mathematics for Engineers (BSEDE) (Schlichtmann) | |
| WS | Grundlagen der Elektrotechnik I (BSES, EI10014) (Schlichtmann) | |
| WS | SS | Entwurf digitaler Systeme mit VHDL u. System C (BSEI, EI0690) (Ecker) |
| SS | Entwurfsverfahren für integrierte Schaltungen (BSES, EI43811) (Schlichtmann) | |
| SS | Schaltungssimulation (BSEI, EI06691) (Schlichtmann/ Leibl) |
Masterbereich: MSc-EI, MSCE, ICD
| SS | Advanced Topics in Communication Electronics (MSCE, EI79002) | ||
| SS | Electronic Design Automation (MSMCD, MSCE, MSEI, EI70610) (Schlichtmann, Tseng) | ||
| WS | Design Methodology and Automation (ICD) (Schlichtmann) | ||
| WS | Embedded System Design for Machine Learning (MSCE, MSEI, EI71040) (Ecker) | ||
| SS | Simulation and Optimization of Analog Circuits (ICD) (Gräb) | ||
| SS | Mixed Integer Programming and Graph Algorithms in Engineering Problems (MSMCD, MSCE, MSEI, EI71059) (Tseng) | ||
| WS | SS | Numerische Methoden der Elektrotechnik (MSEI, EI70440) (Schlichtmann/ Truppel) | |
WS WS | SS | Seminar VLSI-Entwurfsverfahren (MSEI, EI7750) (Schlichtmann) Seminar on Topics in Electronic Design Automation (MSMCD, MSCE, EI77502) (Schlichtmann) | |
| WS | SS | Synthesis of Digital Systems (MSCE, MSEI, EI70640) (Geier) | |
| WS | Testing Digital Circuits (MSMCD, MSCE, MSEI, EI50141) (Otterstedt) | ||
| WS | SS | VHDL System Design Laboratory (MSCE, MSEI, EI7403) (Schlichtmann) | |
| WS | SS | HDL Chip Design Laboratory (MSMCD, CIT431016) (Schlichtmann) |
BSES: Bachelor of Science Engineering Science (TUM-ED)
BSEDE: Bachelor of Science in Electronics and Data Engineering (TUM-Asia)
ICD: Master of Science in Integrated Circuit Design (TUM-Asia)
MSMCD: Master of Science in Microelectronics and Chip Design (TUM)
MSCE: Master of Science in Communications Engineering (TUM)
MSEI: Master of Science in Elektrotechnik und Informationstechnik
BSEI: Bachelor of Science in Elektrotechnik und Informationstechnik